H03M13/3769

METHOD AND DEVICE FOR CORRECTING LOW-LATENCY ERRORS FOR RETRIEVING DATA PACKETS
20190319645 · 2019-10-17 · ·

The invention relates to a method for transmitting data, comprising the steps of: encoding data to be transmitted in the form of source symbols (S) grouped into a data block (DB), distributing the source symbols of the data block in sub-blocks (SB), calculating for each sub-block a respective repair symbol (R1-R9) by a linear combination of source symbols of the sub-block, and transmitting the data block in a stream of data blocks, by successively transmitting each sub-block of the data block, each sub-block being transmitted by transmitting the source symbols of the sub-block, followed by the repair symbol of the sub-block.

Fully parallel turbo decoding

A circuit performs a turbo detection process recovering data symbols from a received signal effected, during transmission, by a Markov process with effect that the data symbols are dependent on preceding data symbols represented as a trellis having a plurality of trellis stages. The circuit comprises processing elements, associated with trellis stages representing these dependencies and each configured to receive soft decision values corresponding to associated data symbols Each processing element configured, in one clock cycle to receive data representing a priori forward and backward state metrics, and a priori soft decision values for data symbols detected for the trellis stage. For each clock cycle of the turbo detection process, the circuit processes, for processing elements representing the trellis stages, the a priori information for associated data symbols detected for the trellis stage, and to provide extrinsic soft decision values corresponding to data symbols for a next clock cycle.

TRANSMITTER AND METHOD FOR GENERATING ADDITIONAL PARITY THEREOF

A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate an LDPC codeword including the input bits and parity bits to be transmitted in a current frame; a parity permutator configured to perform parity-permutation by interleaving the parity bits and group-wise interleaving a plurality of bit groups configuring the interleaved parity bits based on a group-wise interleaving pattern including a first pattern and a second pattern; a puncturer configured to puncture some of the parity-permutated parity bits; and an additional parity generator configured to select at least some of the punctured parity bits to generate additional parity bits to be transmitted in a previous frame of the current frame, based on the first pattern and the second pattern, wherein the first pattern determines parity bits to remain after the puncturing and then to be transmitted in the current frame.

METHODS AND APPARATUS FOR TRANSMISSION AND RECEPTION WITH POLAR CODES

Method and apparatus for transmission and reception with polar codes are provided to support up to 16 permutations or transformation mappings. For example, 16 versions of copies able to be soft-combined for PBCH or any other data channel or control channel are suggested if the mother code length is 256 or 512 or 1024. With the new design, up to 16 different versions can be used to soft combined to improve the performance. Some sequences are provided as examples to support 16 different permutation patterns. The inverse of these sequences also have the feature to support 16 different permutation patterns.

DATA TRANSMISSION METHOD, SENDING DEVICE, RECEIVING DEVICE, AND COMMUNICATIONS SYSTEM
20190288708 · 2019-09-19 ·

This application discloses a data transmission method, a sending device, a receiving device, and a communications system. The sending device is configured to send a first transport block. The sending device obtains a coded bit segment from a first encoded code block. The first encoded code block is obtained after LDPC encoding is performed on a first code block in the first transport block based on a processing capability of the receiving device. The sending device sends the coded bit segment to the receiving device. Because the processing capability of the receiving device is considered, storage overheads of the sending device or the receiving device can be reduced, encoding or decoding complexity can be reduced, and a decoding success rate can be improved.

System and method for adaptive multiple read of NAND flash
10417087 · 2019-09-17 · ·

A system and method for adaptive multiple read of NAND flash memory. A solid state drive may employ adaptive multiple-read to perform enhanced performance error correction using soft decisions without a performance penalty that otherwise might result from performing unnecessary reads. The soft decision error correcting algorithm may employ lookup tables containing log likelihood ratios. The method may include performing one or more read operations to obtain one or more raw data words for a code word, attempting to decode the code words using the one or more raw data words, and performing additional read operations when the decoding attempt fails. This process may be repeated until a decoding attempt succeeds.

TRANSMITTER AND METHOD FOR GENERATING ADDITIONAL PARITY THEREOF

A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate an LDPC codeword including the input bits and parity bits to be transmitted in a current frame; a parity permutator configured to interleave the parity bits and group-wise interleave a plurality of parity bit groups configuring the interleaved parity bits based on a group-wise interleaving pattern including a first pattern and a second pattern to perform parity permutation; a puncturer configured to puncture at least some of the group-wise interleaved parity bit groups; and an additional parity generator configured to select at least some of the punctured parity bit groups to generate additional parity bits to be transmitted in a previous frame of the current frame, based on the first pattern and the second pattern.

Transmitter and method for generating additional parity thereof

A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate an LDPC codeword including the input bits and parity bits to be transmitted in a current frame; a parity permutator configured to perform parity-permutation by interleaving the parity bits and group-wise interleaving a plurality of bit groups configuring the interleaved parity bits based on a group-wise interleaving pattern including a first pattern and a second pattern; a puncturer configured to puncture some of the parity-permutated parity bits; and an additional parity generator configured to select at least some of the punctured parity bits to generate additional parity bits to be transmitted in a previous frame of the current frame, based on the first pattern and the second pattern, wherein the first pattern determines parity bits to remain after the puncturing and then to be transmitted in the current frame.

TRANSMITTER AND METHOD FOR GENERATING ADDITIONAL PARITY THEREOF

A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate an LDPC codeword including the input bits and parity bits to be transmitted to a receiver in a current frame; a repeater configured to repeat, in the LDPC codeword, at least some bits of the LDPC codeword in the LDPC codeword so that the repeated bits are to be transmitted in the current frame; a puncturer configured to puncture some of the parity bits; and an additional parity generator configured to select at least some bits of the LDPC codeword including the repeated bits, and generate additional parity bits to be transmitted in a previous frame of the current frame.

Transmitter and method for generating additional parity thereof

A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate an LDPC codeword including the input bits and parity bits to be transmitted in a current frame; a parity permutator configured to perform by group-wise interleaving a plurality of bit groups configuring the parity bits based on a group-wise interleaving pattern comprising a first pattern and a second pattern; a puncturer configured to puncture some of the parity-permutated parity bits; and an additional parity generator configured to select at least some of the punctured parity bits to generate additional parity bits to be transmitted in a previous frame of the current frame, based on the first pattern and the second pattern.