Patent classifications
H03M13/39
PRE-CODING AND DECODING POLAR CODES USING LOCAL FEEDBACK
Disclosed are devices, systems and methods for precoding and decoding polar codes using local feedback are described. One example method for improving an error correction capability of a decoder includes receiving a noisy codeword vector of length n, the codeword having been generated based on a concatenation of a convolutional encoding operation and a polar encoding operation and provided to a communication channel prior to reception by the decoder, performing a successive-cancellation decoding operation on the noisy codeword vector to generate a plurality of polar decoded symbols (n), generating a plurality of information symbols (k) by performing a convolutional decoding operation on the plurality of polar decoded symbols, wherein k/n is a rate of the concatenation of the convolutional encoding operation and the polar encoding operation, and performing a bidirectional communication between the successive-cancellation decoding operation and the convolutional decoding operation.
ITERATIVE DECODER FOR DECODING A CODE COMPOSED OF AT LEAST TWO CONSTRAINT NODES
An iterative decoder, comprises:
N variable nodes (VNs) v.sub.n, n=1 . . . N, configured to receive a LLR I.sub.n defined on a alphabet A.sub.l of q.sub.ch quantization bits, q.sub.ch≥2;
M constraint nodes (CNs) c.sub.m, m=1 . . . M, 2≤M<N;
v.sub.n and c.sub.m exchanging messages along edges of a Tanner graph;
each v.sub.n sending messages m.sub.v.sub.
each c.sub.m sending messages m.sub.c.sub.
the LLR I.sub.n and the messages m.sub.v.sub.
each variable node v.sub.n, for each iteration l, compute:
sign-preserving factors:
where ξis a positive or a null integer;
and
Techniques to improve error correction using an XOR rebuild scheme of multiple codewords and prevent miscorrection from read reference voltage shifts
Examples include techniques to improve error correction using an exclusive OR (XOR) rebuild scheme that includes two uncorrectable codewords. Examples include generation of soft XOR codewords using bits of correctable codewords to rebuild a codeword read from a memory that has uncorrectable errors and adjust bit reliability information to generate a new codeword having correctable errors. Examples also include techniques to prevent mis-correction due to read reference voltage shifts using non-linear transformations.
ERROR DETECTION AND CORRECTION USING MACHINE LEARNING
A memory system including a memory device and a memory controller including a processor. The memory controller is configured to read outputs from the memory cells in response to a read command from a host and to convert the read outputs to a first codeword. The processor performs a first error correcting code (ECC) operation on the first codeword. The processor is further configured to apply, for each selected memory cell among the memory cells, a corresponding one of the read outputs and at least one related feature as input features to a machine learning algorithm to generate a second codeword, and the memory controller is configured to perform a second ECC operation on the second codeword, when the first ECC operation fails.
ASYMMETRIC LLR GENERATION USING ASSIST-READ
A method of operating a storage system is provided. The storage system includes memory cells and a memory controller, wherein each memory cell is an m-bit multi-level cell (MLC), where m is an integer, and the memory cells are arranged in m pages. The method includes determining initial LLR (log likelihood ratio) values for each of the m pages, comparing bit error rates in the m pages, identifying a programmed state in one of the m pages that has a high bit error rate (BER), and selecting an assist-read threshold voltage of the identified page. The method also includes performing an assist-read operation on the identified page using the assist-read threshold voltage, determining revised LLR values for the identified page based on results from the assist-read operation, and performing soft decoding using the revised LLR values for the identified page and the initial LLR values for other pages.
LLR estimation for soft decoding
A method of soft decoding received signals. The method comprising defining quantisation intervals for a signal value range, determining a number of bits in each quantisation interval that are connected to unsatisfied constraints, providing, the number of bits in each quantisation interval that are connected to unsatisfied constraints, as an input to a trained model, wherein the trained model has been trained to cover an operational range of a device for soft decoding of signals, determining, using the trained model, a log likelihood ratio for each quantisation interval, and performing soft decoding using the log likelihood ratios.
DECODER AND DECODING METHOD
The disclosed structures and methods are directed to decoders and to methods for decoding codes, for example, polar codes. The decoder comprises: a codeword node decoding pipeline having three logic units, and configured to, for each encoded codeword node: based on a received instruction sequence, adjust the three logic units for decoding of each encoded codeword node, and decode a set of logarithmic likelihood ratios (LLRs) corresponding to the encoded codeword node to generate decoded bits. The decoder also has an output storage configured to store the decoded bits corresponding to each encoded codeword node, and generate a decoded codeword based on the decoded bits. The decoding method comprises adjusting the codeword node decoding pipeline to each encoded codeword node based on codeword node length and a codeword node type, as well as a bit index of the encoded codeword node.
Method for polar decoding with dynamic successive cancellation list size and polar decoder
It provides a method (300) for polar decoding a received signal into a number, N, of bits with Successive Cancellation List, SCL. The method (300) includes: at the i-th level of a binary tree for decoding the i-th bit of the N bits, where 1≤i≤N: when the i-th bit is an information bit, calculating (310) a path metric for each of 2*L.sub.i-1 candidate paths at the i-th level, where L.sub.i-1 is an SCL size at the (i−1)-th level and L.sub.0=1; setting (320) an SCL size at the i-th level, L.sub.i, based on L.sub.i-1 and a statistical distribution of the path metrics calculated for the 2*L.sub.i-1 candidate paths; and selecting (330) L.sub.i surviving paths from the 2*L.sub.i-1 candidate paths based on their respective path metrics.
METHODS AND SYSTEMS FOR MANAGING DECODING OF CONTROL CHANNELS ON A MULTI-SIM UE
Methods and systems for managing decoding of control channel on a multi-SIM UE. A method includes receiving, by the UE, the plurality of control channels from at least one Base Station (BS), the plurality of control channels corresponding to a plurality of Subscriber Identity Modules (SIMs), selecting, by the UE, a respective decoder for each of the plurality of SIMS, and decoding, by the UE, each respective control channel among the plurality of control channels using the respective decoder for a respective SIM among the plurality of SIMS, the respective SIM corresponding to the respective control channel.
Multidimensional multilevel coding encoder and decoder
A multidimensional multilevel coding (MLC) encoder comprises a soft forward error correction (FEC) encoder receiving first bits for generating soft FEC encoded bits, a redundancy generator receiving a subset of the soft FEC encoded bits for generating redundant bits, and a hard FEC encoder receiving second bits for generating hard FEC encoded bits. Combinations of the soft FEC encoded bits, the redundant bits, and the hard FEC encoded bits form labels for mapping to a plurality of constellation points. A MLC decoder comprises a redundancy decoder, a soft FEC decoder and a hard FEC decoder. The redundancy decoder combines log-likelihood-ratios (LLR) of soft FEC encoded bits received from the MLC encoder to allow the soft FEC decoder to produce decoded bits. Decoding of hard FEC encoded bits by the hard FEC decoder is conditioned on values of the bits decoded by the soft FEC decoder.