Patent classifications
H03M13/39
Architecture for guessing random additive noise decoding (GRAND)
There is provided a method comprising, at a data receiver, receiving a channel codeword from a data sender over a noisy data channel, generating a plurality of candidate error patterns, the plurality of candidate error patterns comprising a plurality of one-bit error patterns and a plurality of multiple-bit error patterns generated from the plurality of one-bit error patterns, evaluating the plurality of candidate error patterns for codebook membership, based on the channel codeword, and outputting an estimated codeword when a codebook membership constraint is satisfied for a given candidate error pattern.
Method and polar code decoder for determining to-be-flipped bit position
The disclosure provides a method and a polar code decoder for determining a to-be-flipped bit position when performing a successive cancellation list flip operation. The method includes: obtaining a polar code decoding tree generated by performing a successive cancellation list (SCL) operation on a polar code segment, and the polar code segment includes multiple bit positions, and each bit position in the polar code decoding tree includes multiple surviving paths and multiple pruned paths; in a post-processing stage for the SCL operation, estimating a correct path probability of each of the surviving paths and the pruned paths of the i-th bit position and accordingly estimating a reliability for the i-th bit position; selecting a specific bit position among the bit positions based on the reliability of each bit position; and performing an SCL flip operation on the polar code decoding tree based on the specific bit position.
Parameter estimation with machine learning for flash channel
Estimation of read parameters for a read channel of a solid-state storage device using a machine learning apparatus. The machine learning apparatus may be provided with signal count metrics from multiple regions of the memory cell signal space and syndrome weights from an error correction code. Other inputs may also be provided comprising metrics of the memory or read operations. In an example, the read parameters may include one or more reference threshold voltage values for read voltages applied to a memory cell and/or log-likelihood ratio (LLR) values for the memory cell.
DATA SCRAMBLING METHOD THAT CONTROLS CODE DENSITY
A data scrambling method for controlling a code density according to an exemplary embodiment of the present disclosure includes receiving a plain code which is a code to be stored in the non-volatile memory device and a storage address at which the plain code is recorded; determining a rank corresponding to the plain code, using an ET table including appearance frequency rank information corresponding to individual plain code; calculating an adjustment rank corresponding to the plain code, using the rank and a random number that is generated based on the address of storage address; determining a cipher code corresponding to the appearance frequency rank of the plain code, using the adjustment rank and an ECC table including rank information determined by an objective function for individual cipher code; and storing the cipher code in the storage address.
INNER FEC ENCODING SYSTEMS AND METHODS
The present invention is directed to communication systems and methods. According to a specific embodiment, FEC data streams from multiple FEC data lanes are received. First stage interleaving and inner encoding are performed on the FEC data streams to generate inner encoded data streams. A second stage interleaving process is performed to interleave the inner encoded data streams. There are other embodiments as well.
ERROR RECOVERY USING ADAPTIVE LLR LOOKUP TABLE
Systems and methods are provided for performing error recovery using LLRs generated from multi-read operations. A method may comprise selecting a set of decoding factors for a multi-read operation to read a non-volatile storage device multiple times. The set of decoding factors may include a total number of reads, an aggregation mode for aggregating read results of multiple reads, and whether the read results include soft data. The method may further comprise issuing a command to the non-volatile storage device to read user data according to the set of decoding factors, generating a plurality of Log-Likelihood Ratio (LLR) values using a mapping engine from a pre-selected set of LLR value magnitudes based on the set of decoding factors, obtaining an aggregated read result in accordance with the aggregation mode and obtaining an LLR value from the plurality of LLR values using the aggregated read result as an index.
Decoder and decoding method
The disclosed structures and methods are directed to decoders and to methods for decoding codes, for example, polar codes. The decoder comprises: a codeword node decoding pipeline having three logic units, and configured to, for each encoded codeword node: based on a received instruction sequence, adjust the three logic units for decoding of each encoded codeword node, and decode a set of logarithmic likelihood ratios (LLRs) corresponding to the encoded codeword node to generate decoded bits. The decoder also has an output storage configured to store the decoded bits corresponding to each encoded codeword node, and generate a decoded codeword based on the decoded bits. The decoding method comprises adjusting the codeword node decoding pipeline to each encoded codeword node based on codeword node length and a codeword node type, as well as a bit index of the encoded codeword node.
Advanced ultra low power error correcting code encoders and decoders
Advanced ultra-low power error correcting codes are generated using soft quantization and lattice interpolation based on clock and Syndrome Weight. Reinforcement learning may be used to generate threshold values for flipping bits for low density parity check Ultra-Low Power error correction codes. The threshold values can be generated offline and downloaded to a storage device or generated while the storage device is in use.
FORWARD ERROR CORRECTION USING NON-BINARY LOW DENSITY PARITY CHECK CODES
Methods, systems and devices for forward error correction in orthogonal time frequency space (OTFS) communication systems using non-binary low-density parity-check (NB-LDPC) codes are described. One exemplary method for forward error correction includes receiving data, encoding the data via a non-binary low density parity check (NB-LDPC) code, wherein the NB-LDPC code is characterized by a matrix with binary and non-binary entries, modulating the encoded data to generate a signal, and transmitting the signal. Another exemplary method for forward error correction includes receiving a signal, demodulating the received signal to produce data, decoding the data via a NB-LDPC code, wherein the NB-LDPC code is characterized by a matrix with binary and non-binary entries, and providing the decoded data to a data sink.
System and method for identifying and decoding Reed-Muller codes in polar codes
A method and an apparatus are provided for decoding a polar code. A simplified successive cancellation list (SSCL) decoding tree for the polar code is generated. The SSCL decoding tree includes a plurality of nodes. One or more nodes of the plurality of nodes are identified as employing Reed-Muller codes for decoding. Decoding of received log-likelihood ratios (LLRs) is performed using Reed-Muller codes at the one or more nodes. Hard decision values are output from the one or more nodes.