A method of decoding data stored in non-volatile memory in which each memory cell stores data by adopting one of a plurality of storage states. The method comprises using a threshold for determining a physical property of the memory cells to distinguish between at least two storage states, reading a data codeword from a plurality of the memory cells using the threshold and determining a bit error rate for the data codeword read using the threshold, repeatedly modifying said threshold and re-reading said data codeword using said modified threshold and determining a modified bit error rate for the data codeword read using the modified threshold, selecting the one of the modified thresholds for which the mutual information content between the stored data input and the read data is maximised based on the bit error rate for the data codeword read using the threshold and the bit error rate for the data codeword read using the modified threshold, determining a log likelihood ratio of a quantisation interval bounded by the threshold and the selected threshold generating soft decoded data by performing soft decoding of the data using said log likelihood ratio and outputting the soft decoding data.

A method of decoding data stored in non-volatile memory in which each memory cell stores data by adopting one of a plurality of storage states. The method comprises using a threshold for determining a physical property of the memory cells to distinguish between at least two storage states, reading a data codeword from a plurality of the memory cells using the threshold and determining a bit error rate for the data codeword read using the threshold, repeatedly modifying said threshold and re-reading said data codeword using said modified threshold and determining a modified bit error rate for the data codeword read using the modified threshold, selecting the one of the modified thresholds for which the mutual information content between the stored data input and the read data is maximised based on the bit error rate for the data codeword read using the threshold and the bit error rate for the data codeword read using the modified threshold, determining a log likelihood ratio of a quantisation interval bounded by the threshold and the selected threshold generating soft decoded data by performing soft decoding of the data using said log likelihood ratio and outputting the soft decoding data.

A method for iteratively decoding read bits in a solid state storage device. The read bits are encoded with a Q-ary LDPC code defined over a binary-extension Galois field GF(2.sup.r) and having length N. The method comprises determining a binary Tanner graph of the Q-ary LDPC code based on a Q-ary Tanner graph of the Q-ary LDPC code, and based on a binary coset representation of the Galois field GF(2.sup.r). The binary Tanner graph comprises, for each Q-ary variable node/Q-ary check node pair of the Q-ary Tanner graph, (2.sup.r-1) binary variable nodes each one being associated with a respective one of said cosets; (2.sup.r-1-r) binary parity-check nodes each one being connected to one or more of said (2.sup.r-1) binary variable nodes according to said binary coset representation of the Galois field GF(2.sup.r), wherein each binary parity-check node corresponds to a respective parity-check equation associated with a first parity-check matrix that results from said binary coset representation, and (2.sup.r-1) binary check nodes each one being connected to a respective one of said (2.sup.r-1) binary variable nodes according to a second parity-check matrix defining the Q-ary LDPC code. The method further comprises, based on a Majority-Logic decoding algorithm, mapping the read bits into N symbols each one including, for each bit thereof, a bit value and a reliability thereof, and providing each symbol of said N symbols to a respective Q-ary variable node, wherein each bit of said each symbol is provided to a respective one of the (2.sup.r-1) binary variable nodes of said respective Q-ary variable node. The method also comprises, based on the Majority-Logic decoding algorithm, iteratively performing the following steps: i) at each binary check node, determining a first bit estimate and a first bit reliability of each bit of the respective symbol according to, respectively, a second bit estimate and a second bit reliability of that bit that are determined at each binary variable node connected to that binary check node, and ii) at each binary variable node, updating the second bit estimate and the second bit reliability of each bit of the respective symbol based on the first bit estimate and the first bit reliability of that bit determined at each binary check node connected to that binary variable node, and based on the parity-check equation associated with the first parity-check matrix and corresponding to the parity-check node connected to that binary variable node.

A method of decoding data stored in non-volatile memory in which each memory cell stores data by adopting one of a plurality of storage states. The method comprises using a threshold for determining a physical property of the memory cells to distinguish between at least two storage states, reading a data codeword from a plurality of the memory cells using the threshold and determining a bit error rate for the data codeword read using the threshold, repeatedly modifying said threshold and re-reading said data codeword using said modified threshold and determining a modified bit error rate for the data codeword read using the modified threshold, selecting the one of the modified thresholds for which the mutual information content between the stored data input and the read data is maximised based on the bit error rate for the data codeword read using the threshold and the bit error rate for the data codeword read using the modified threshold, determining a log likelihood ratio of a quantisation interval bounded by the threshold and the selected threshold generating soft decoded data by performing soft decoding of the data using said log likelihood ratio and outputting the soft decoding data.

A method of decoding data stored in non-volatile memory in which each memory cell stores data by adopting one of a plurality of storage states. The method comprises using a threshold for determining a physical property of the memory cells to distinguish between at least two storage states, reading a data codeword from a plurality of the memory cells using the threshold and determining a bit error rate for the data codeword read using the threshold, repeatedly modifying said threshold and re-reading said data codeword using said modified threshold and determining a modified bit error rate for the data codeword read using the modified threshold, selecting the one of the modified thresholds for which the mutual information content between the stored data input and the read data is maximised based on the bit error rate for the data codeword read using the threshold and the bit error rate for the data codeword read using the modified threshold, determining a log likelihood ratio of a quantisation interval bounded by the threshold and the selected threshold generating soft decoded data by performing soft decoding of the data using said log likelihood ratio and outputting the soft decoding data.

A method in a first wireless device (WD) supporting wireless communication with a second WD is described. A plurality of wireless packets is received from the second WD including at least a first wireless packet. At least another wireless packet of the plurality of wireless packets is one of a retry packet and a repeat packet of the first packet. Each wireless packet of the plurality of wireless packets includes a plurality of bits and a first group of bits. For each received wireless packet, the plurality of bits corresponding to the received wireless packet is de-spread, and the first group of bits is correlated with a predetermined group of bits. The method further includes performing a majority vote based on the correlation of the first group of bits of each received wireless packet and creating a corrected packet based in part on the majority vote.

A method in a first wireless device (WD) supporting wireless communication with a second WD is described. A plurality of wireless packets is received from the second WD including at least a first wireless packet. At least another wireless packet of the plurality of wireless packets is one of a retry packet and a repeat packet of the first packet. Each wireless packet of the plurality of wireless packets includes a plurality of bits and a first group of bits. For each received wireless packet, the plurality of bits corresponding to the received wireless packet is de-spread, and the first group of bits is correlated with a predetermined group of bits. The method further includes performing a majority vote based on the correlation of the first group of bits of each received wireless packet and creating a corrected packet based in part on the majority vote.

A decoder includes circuitry and multiple Variable-Node Circuits (VNCs). The VNCs individually hold one or more variables of an Error Correction Code (ECC) that is representable by a plurality of check equations defined over the variables. The circuitry is configured to receive a code word including variables having m-bit values that was encoded using the ECC, to further receive reliability levels assigned respectively to the variables, to decode the code word by applying to the code word a sequence of iterations, including deciding in a given iteration whether a given VNC is to be processed or skipped in that iteration, depending on the reliability levels assigned to the variables of the given VNC, and, when the given VNC is selected for processing, to make a decision whether or not to update one or more of the variables of the given VNC, and to apply the decision by the given VNC.

Methods, systems, and devices for operating memory cell(s) using an enhanced bit flipping scheme are described. An enhanced bit flipping scheme may include methods, systems, and devices for performing error correction of data bits in a codeword concurrently with the generation of a flip bit that indicates whether data bits in a corresponding codeword are to be flipped; for refraining from performing error correction of inversion bit(s) in the codeword; and for generating a high-reliability flip bit using multiple inversion bits. For instance, a flip bit that is even more reliable may be generated by determining whether a number of, a majority of, or all of the inversion bits indicate that the data bits are in an inverted state.

Systems and methods are provided for concatenated error-correcting coding. An apparatus may include a Low-Density Parity-Check (LDPC) decoder configured to perform an iterative LDPC decoding process on bits of an LDPC codeword, a Bose-Chaudhuri-Hocquenghem (BCH) decoder coupled to the LDPC decoder and a BCH scheduler coupled to the LDPC decoder and the BCH decoder. The LDPC codeword may be generated by LDPC encoding a Bose-Chaudhuri-Hocquenghem (BCH) codeword and the BCH codeword may be generated by BCH encoding a data unit. The BCH scheduler may be configured to determine whether a triggering condition for the BCH decoder is met after each iteration of the iterative LDPC decoding process and activate the BCH decoder to operate on an intermediate decoding result of the LDPC decoder if the triggering condition for the BCH decoder is met.