Patent classifications
H03M13/45
Decoding device, decoding method, control circuit, and storage medium
A decoding device includes: a hard decision decoder generating a first decoding result by performing hard decision decoding of a polar code using an input signal, and generating a first error detection result by performing first error detection processing on the first decoding result; a soft decision decoder generating a second decoding result by performing successive decoding of a polar code on the input signal, obtained for each decoding step in the successive decoding, and generating a second error detection result by performing second error detection processing on a result obtained by updating the first decoding result using the second decoding result; a data selector selecting and outputting either the first decoding result or the result obtained by updating the first decoding result using the second decoding result; and a controller stopping the soft decision decoder when the data selector outputs the final decoding result.
Decoding device, decoding method, control circuit, and storage medium
A decoding device includes: a hard decision decoder generating a first decoding result by performing hard decision decoding of a polar code using an input signal, and generating a first error detection result by performing first error detection processing on the first decoding result; a soft decision decoder generating a second decoding result by performing successive decoding of a polar code on the input signal, obtained for each decoding step in the successive decoding, and generating a second error detection result by performing second error detection processing on a result obtained by updating the first decoding result using the second decoding result; a data selector selecting and outputting either the first decoding result or the result obtained by updating the first decoding result using the second decoding result; and a controller stopping the soft decision decoder when the data selector outputs the final decoding result.
DECODING METHOD ADOPTING ALGORITHM WITH WEIGHT-BASED ADJUSTED PARAMETERS AND DECODING SYSTEM
A decoding method adopting an algorithm with weight-based adjusted parameters and a decoding system are provided. The decoding method is applied to a decoder. M×N low density parity check codes (LDPC codes) having N variable nodes and M check nodes are generated from input signals. In the decoding method, information of the variable nodes and the check nodes is initialized. The information passed from the variable nodes to the check nodes is formed after multiple iterations. After excluding a connection to be calculated, a product of the remaining connections between the variable nodes and the check nodes is calculated. Next, an estimated first minimum or an estimated second minimum can be calculated with multi-dimensional parameters. The information passed from the check nodes to the variable nodes can be updated for making a decision.
Neural networks for forward error correction decoding
Methods and apparatus for training a neural network to recover a codeword and for decoding a received signal using a neural network are disclosed. According to examples of the disclosed methods, a syndrome check is introduced at even layers of the neural network during the training, testing and online phases. During training, optimisation of trainable parameters of the neural network is ceased after optimisation at the layer at which the syndrome check is satisfied. Examples of the method for training a neural network may be implemented via a proposed loss function. During testing and online phases, propagation through the neural network is ceased at the layer at which the syndrome check is satisfied.
Neural networks for forward error correction decoding
Methods and apparatus for training a neural network to recover a codeword and for decoding a received signal using a neural network are disclosed. According to examples of the disclosed methods, a syndrome check is introduced at even layers of the neural network during the training, testing and online phases. During training, optimisation of trainable parameters of the neural network is ceased after optimisation at the layer at which the syndrome check is satisfied. Examples of the method for training a neural network may be implemented via a proposed loss function. During testing and online phases, propagation through the neural network is ceased at the layer at which the syndrome check is satisfied.
Processor instructions for iterative decoding operations
A storage circuit is configured to store multiple vectors associated with variable and check nodes of an iterative decoding operation. As part of the iterative decoding operation, a processor circuit is configured to retrieve, from the storage circuit, an intermediate value vector, a first estimation vector, a second estimation vector, and a sign vector, and determine an absolute value of the intermediate value vector. The processor circuit is also configured, using the retrieved vectors, to generate updated values for the first and second estimation vectors as part of determining a bit estimate for a check node included in the iterative decoding operation.
Processor instructions for iterative decoding operations
A storage circuit is configured to store multiple vectors associated with variable and check nodes of an iterative decoding operation. As part of the iterative decoding operation, a processor circuit is configured to retrieve, from the storage circuit, an intermediate value vector, a first estimation vector, a second estimation vector, and a sign vector, and determine an absolute value of the intermediate value vector. The processor circuit is also configured, using the retrieved vectors, to generate updated values for the first and second estimation vectors as part of determining a bit estimate for a check node included in the iterative decoding operation.
Data processing device
A data processing device includes a plurality of variable nodes configured to receive and store a plurality of target bits; a plurality of check nodes each configured to receive stored target bits from one or more corresponding variable nodes of the plurality of variable nodes, check whether received target bits have an error bit, and transmit a check result to the corresponding variable nodes; and a group state value manager configured to determine group state values of variable node groups into which the plurality of variable nodes are grouped.
Decoding apparatus and decoding method for decoding operation in channel coding
The present disclosure relates to a decoding method. The decoding method includes a sequentially determining series of source bits from a codeword by performing a first decoding operation and a second decoding operation. For instance, a series of N source bits may be divided into a first bit group of X source bits and a second bit group of Y source bits. The initial X source bits are sequentially determined in the first decoding operation and the remaining Y source bits are sequentially determined in the second decoding operation. The first decoding operation includes sorting at least 2L reliability values, which are calculated from L bit sequences, where L is an integer greater than 0. The second decoding operation includes determining a source bit in each of the L bit sequences, based on the at least 2L reliability values.
Decoding apparatus and decoding method for decoding operation in channel coding
The present disclosure relates to a decoding method. The decoding method includes a sequentially determining series of source bits from a codeword by performing a first decoding operation and a second decoding operation. For instance, a series of N source bits may be divided into a first bit group of X source bits and a second bit group of Y source bits. The initial X source bits are sequentially determined in the first decoding operation and the remaining Y source bits are sequentially determined in the second decoding operation. The first decoding operation includes sorting at least 2L reliability values, which are calculated from L bit sequences, where L is an integer greater than 0. The second decoding operation includes determining a source bit in each of the L bit sequences, based on the at least 2L reliability values.