A method is proposed for decoding read bits including information bits from memory cells of a solid state drive. The method comprises determining a reliability indication indicative of a reliability of the read bits, and iterating the following sequence of steps: soft decoding the read bits based on said reliability indication in order to obtain said information bits, determining at least one among a time indication indicative of a time elapsed since a last writing of the memory cells and a temperature indication indicative of a temperature of the memory cells, and applying at least one among said time indication and said temperature indication to said reliability indication.

A corresponding solid state drive is also proposed.

A method is proposed for decoding read bits including information bits from memory cells of a solid state drive. The method comprises providing an indication of reliability of the read bits, and, based on said indication of reliability, iteratively soft decoding the read bits in order to obtain said information bits. Said soft decoding comprises, at each iteration of the soft decoding, if the current number of iterations has reached a predetermined number of iterations indicative of an admitted latency of the solid state drive, and if no information bits having an error rate below a predetermined error rate have been obtained, providing a further indication of reliability of the read bits, and iteratively soft decoding the read bits based on said further indication of reliability.

A corresponding solid state drive is also proposed.

A method is proposed for decoding bits stored in memory cells of a solid state drive. Each memory cell comprises a floating gate transistor adapted to store a bit pattern, among a plurality of possible bit patterns, when programmed at a threshold voltage associated with that bit pattern, each threshold voltage being variable over the memory cells thereby defining, for each bit pattern, a corresponding threshold voltage distribution. The bit pattern of each memory cell comprises first and second bits, and the solid state drive is suitable for reading the bit patterns based on fixed reference voltages, each one designed to discern between two respective adjacent threshold voltage distributions, and on additional reference voltages different from the fixed reference voltages. The solid state drive is capable of soft decoding the read bit patterns based on soft information. The method comprises:

reading the first and second bits of the memory cells based on the fixed reference voltages, to obtain read first bits and read second bits, and

soft decoding the read first bits, wherein the soft information exploited for soft decoding the read first bits are based on the read second bits.

A corresponding solid state drive is also proposed.

The present disclosure relates to a 5G or pre-5G communication system to be provided to support a data transmission rate higher than that of a 4-G communication system, such as LTE, and subsequent communication systems. An apparatus according to one embodiment of the present invention can comprise: a first grouping unit for performing repeated decoding by using an outer decoder and an inner decoder, and grouping, in correspondence to a decoding order, a bit stream, which is received from the outer decoder, from a receiver of a system using binary irregular repeat partial accumulate codes to the inner decoder device; an LLR symbol selection unit for calculating indices of grouped bits having the maximum probability value among the grouped bits, and selecting and outputting a predetermined number of grouped bit LLR values by using the indices of the grouped bits having the maximum probability value; an LLR symbol conversion unit for converting the grouped bit LLR values outputted from the LLR symbol selection unit into symbol LLR values, and outputting the same; a Bahl-Cocke-Jelinek-Raviv (BCJR) processing unit for performing a BCJR algorithm operation on the symbol LLR values; a bit LLR calculation unit for converting an output of the BCJR processing unit into bit LLR values; and a second bit grouping unit for grouping the bit LLR values by predetermined bit units.

A data storage device is disclosed comprising a storage medium. First data is encoded into a first codeword, and second data is encoded into a second codeword, wherein a first code rate of the first codeword is less than a second code rate of the second codeword. The first codeword and the second codeword are interleaved to generate an interleaved codeword that is written to the storage medium.

In an illustrative example, a method includes sensing at least a portion of a representation of a convolutional low-density parity-check (CLDPC) codeword stored at a memory of a data storage device. The method further includes receiving the portion of the representation of the CLDPC codeword at a controller of the data storage device. The method further includes performing one or more management operations associated with the memory based on an estimated number of errors of the portion of the representation of the CLDPC codeword.

A method is provided for determining log-likelihood ratio (LLR) for soft decoding based on information obtained from hard decoding, in a storage system configured to perform hard decoding and soft decoding of low-density parity-check (LDPC) codewords. The method includes performing hard decoding of codewords in a page, the hard decoding including a first hard read and one or more re-reads using predetermined hard read threshold voltages, and grouping memory cells in the page into a plurality of bins based on the read threshold voltages for the first hard read and the one or more re-reads. The method also includes computing parity checksum and one's count for memory cells in each bin, and determining LLR for each bin of memory cells based on read data, checksums, and one's count for each bin.

A method for storing input data in a flash memory. The method comprising generating a codeword by encoding the input data with an error correcting code and generating a shaped codeword by applying a shaping function to at least a part of the codeword. The shaping function comprising logically inverting every n-th occurrence of a bit associated with a high-charge storage state in the part of the codeword. The method further comprising writing the shaped codeword to the flash memory, generating an estimated shaped codeword by reading the flash memory, generating soft decision information for the estimated shaped codeword, and retrieving the input data by decoding the soft decision information using an error correcting code soft decoder.

Methods and systems for decoding raw data may include determining a sequence of a plurality of read-level voltages based on previous decoding data and executing a multi-stage decoding operation to decode raw data read from the plurality of memory cells using the determined sequence of the plurality of read-level voltages. Decoded data is returned from the multi-stage decoding operation upon completion of the multi-stage decoding operation and the previous decoding data is updated based on results of the multi-stage decoding operation.

According to one embodiment, a memory system includes a non-volatile memory, a memory interface that reads data recorded in the non-volatile memory as a received value, a converting unit that converts the received value to first likelihood information by using a first conversion table, a decoder that decodes the first likelihood information, a control unit that outputs an estimated value with respect to the received value, which is a decoding result obtained by the decoding, when decoding by the decoder has succeeded, and a generating unit that generates a second conversion table based on a decoding result obtained by the decoding, when decoding of the first likelihood information by the decoder has failed. When the generating unit generates the second conversion table, the converting unit converts the received value to the second likelihood information by using the second conversion table, and the decoder decodes the second likelihood information.