H03M13/6331

SIGNAL TRANSMISSION METHOD AND SYSTEM
20200186402 · 2020-06-11 ·

This application provides a signal transmission method and system, and relates to the field of communications technologies. The system includes an equalization module, a first decoder, and a feedback module. The equalization module includes at least two multi-symbol detectors. The feedback module is connected to the first decoder and the at least two multi-symbol detectors. The equalization module performs equalization processing on convolutional data flows to obtain an equalized data flow. In this process, each multi-symbol detector performs multi-symbol detection processing on a convolutional data flow input into the multi-symbol detector. The first decoder decodes the equalized data flow to obtain a decoded data flow. The feedback module feeds back a feedback data flow to the at least two multi-symbol detectors. The equalization module performs equalization processing on the convolutional data flows based on the feedback data flow.

Signal receiving circuit and operation method thereof

A signal receiving circuit may include a receiving equalizer and a sequence estimator. The receiving equalizer may be configured to compensate an inter-symbol interference in a signal from an external to output an equalization data, based on a receiving signal from an outside. The sequence estimator may be configured to determine a termination symbol, based on the equalization data, to perform a decoding on the receiving signal, based on the determined termination symbol, and to output the decoded receiving signal as a sequence data.

Maximum likelihood error detection for decision feedback equalizers with PAM modulation

The present invention is directed to data communication. More specifically, an embodiment of the present invention provides an error correction system. Input data signals are processed by a feedforward equalization module and a decision feedback back equalization module. Decisions generated by the decision feedback equalization module are processed by an error detection module, which determines error events associated with the decisions. The error detection module implements a reduced state trellis path. There are other embodiments as well.

Method for implementing turbo equalization compensation, turbo equalizer and system

Embodiments of the present application relate to a method for implementing Turbo equalization compensation. The equalizer divides a first data block into n data segments, where D bits in two adjacent data segments in the n data segments overlap, performs recursive processing on each data segment in the n data segments, before the recursive processing, merges the n data segments to obtain a second data block; and performs iterative decoding on the second data block, to output a third data block, where data lengths of the first data block, the second data block, and the third data block are all 1/T of a code length of a LDPC convolutional code.

Implementation of LLR biasing method in non-binary iterative decoding
10547328 · 2020-01-28 · ·

Systems, methods, and apparatus are provided for iteratively decoding a codeword. Once a codeword is received, the codeword is processed to generate an incremental hard decision value and a log likelihood ratio amplitude value. These values are generated by processing the codeword using a soft output Viterbi algorithm. A faulty symbol in the codeword is identified. A complete hard decision value is generated using the incremental hard decision value. The LLR amplitude value and complete hard decision value corresponding to the identified faulty symbol are selectively provided to a decoder and the decoder uses these values to decode the codeword.

Message passing algorithm decoder and methods

Methods and devices are disclosed for receiving and detecting sparse data sequences using a message passing algorithm (MPA) with early propagation of belief messages. Such data sequences may be used in wireless communications systems supporting multiple access, such as sparse code multiple access (SCMA) systems. The determination and passing of one or more messages for an edge between a function node and a variable node in a factor graph representation of the system may be performed in serial with determined values available early for subsequent computations. The serial computations may be scheduled based on various factors.

SIGNAL RECEIVING CIRCUIT AND OPERATION METHOD THEREOF
20190386775 · 2019-12-19 · ·

A signal receiving circuit may include a receiving equalizer and a sequence estimator. The receiving equalizer may be configured to compensate an inter-symbol interference in a signal from an external to output an equalization data, based on a receiving signal from an outside. The sequence estimator may be configured to determine a termination symbol, based on the equalization data, to perform a decoding on the receiving signal, based on the determined termination symbol, and to output the decoded receiving signal as a sequence data.

Method and device for iterative demodulation, equalization and channel decoding
10511410 · 2019-12-17 · ·

The present invention concerns a method and device for demodulating received symbols using a turbo-demodulation scheme comprising an iterative channel equalization and wherein an iterative channel decoder is used in the turbo-demodulation scheme, characterized in that the iterative channel decoder performs a first iterative process named iterative decoding process, the turbo-demodulation performing a second iterative process named iterative demodulation and decoding process, at each iteration of the second iterative process, the iterative channel decoder executing plural iterations in order to decode bits from which symbols are derived from. The iterative channel decoder: memorizes at the end of the iterations of the first iterative process, the variables used internally by the iterative channel decoder, reads the memorized variables at the following iteration of the second iterative process.

METHOD AND APPARATUS FOR AN EQUALIZER BASED ON VITERBI ALGORITHM
20240106536 · 2024-03-28 · ·

An apparatus including at least one processor configured to execute instructions and cause the apparatus to perform, obtaining for a first possible state (s) of a received sample at the current time step (k), log-likelihood ratio, Ilr, values Ilr.sub.old,min, Ilr.sub.old,max of a first transmitted bit (b.sub.j), wherein, the Ilr values Ilr.sub.old,min, Ilr.sub.old,max are respectively associated with a most likely state and a less likely state related to a received sample at the previous time step (k?1); determining based on path metrics and branch metrics corresponding to the received sample at the current time step (k); a first parameter (Q) related to a difference between likelihoods of the most likely state and the less likely state; updating magnitude of the Ilr value Ilr.sub.old,min at least based on the Ilr value Ilr.sub.old,min, the Ilr value Ilr.sub.old,max, and the first parameter, to obtain an updated Ilr value Ilr.sub.old,updated.

Receiver circuits performing error correction including identification of a most likely error event based on an enable signal indicative of presence of errors
11916574 · 2024-02-27 · ·

A receiver includes an error correction module. A syndrome value, calculated based on received signals, may be used to enable the error correction module. The error correction module includes an error generator, a Nyquist error estimator, and a decoder. The decoder uses error estimation generated by the Nyquist error estimator to correct the decoded data. There are other embodiments as well.