H03M13/6597

PARAMETER ESTIMATION WITH MACHINE LEARNING FOR FLASH CHANNEL
20220231706 · 2022-07-21 ·

Estimation of read parameters for a read channel of a solid-state storage device using a machine learning apparatus. The machine learning apparatus may be provided with signal count metrics from multiple regions of the memory cell signal space and syndrome weights from an error correction code. Other inputs may also be provided comprising metrics of the memory or read operations. In an example, the read parameters may include one or more reference threshold voltage values for read voltages applied to a memory cell and/or log-likelihood ratio (LLR) values for the memory cell.

Learning device

According to one embodiment, a learning device includes a noise generation unit, a decoding unit, a generation unit, and a learning unit. The noise generation unit outputs a second code word which corresponds to a first code word to which noise has been added. The decoding unit decodes the second code word and outputs a third code word. The generation unit generates learning data for learning a weight in message passing decoding in which the weight and a message to be transmitted are multiplied, based on whether or not decoding of the second code word into the third code word has been successful. The learning unit determines a value for the weight in the message passing decoding by using the learning data.

Parameter estimation with machine learning for flash channel
11394404 · 2022-07-19 · ·

Estimation of read parameters for a read channel of a solid-state storage device using a machine learning apparatus. The machine learning apparatus may be provided with signal count metrics from multiple regions of the memory cell signal space and syndrome weights from an error correction code. Other inputs may also be provided comprising metrics of the memory or read operations. In an example, the read parameters may include one or more reference threshold voltage values for read voltages applied to a memory cell and/or log-likelihood ratio (LLR) values for the memory cell.

BANDWIDTH CONSTRAINED COMMUNICATION SYSTEMS WITH NEURAL NETWORK BASED DETECTION
20220224361 · 2022-07-14 · ·

The technology relates to bandwidth constrained communication systems with neural network based detection. In some embodiments, a bandwidth constrained equalized transport (BCET) communication system comprises: a transmitter comprising an error control code encoder, a pulse-shaping filter, and a first interleaver; a communication channel; and a receiver comprising a neural network processing block that processes a received signal. The error control code encoder can append redundant information onto the signal. The pulse-shaping filter can intentionally introduce memory into the signal in the form of inter-symbol interference. The first interleaver can change a temporal order of the symbols in the signal. The error control code encoder can be a low-density parity-check (LDPC) error control code encoder. The neural network can be trained with positive mappings between transmitted and decoded training signals, or negative mappings between training signals and a null space of an LDPC generation matrix.

QUANTUM ERROR CORRECTION DECODING SYSTEM AND METHOD, FAULT-TOLERANT QUANTUM ERROR CORRECTION SYSTEM, AND CHIP

A quantum error correction (QEC) decoding system includes an error correction chip. The error correction chip is configured to: obtain error syndrome information of a quantum circuit; and decode the error syndrome information by running neural network decoders, to obtain error result information, a core operation of the neural network decoders being a multiply accumulate (MA) operation of unsigned fixed-point numbers obtained through numerical quantization. According to the present disclosure, for the system that uses the neural network decoders for QEC decoding, the core operation of the neural network decoders is the MA operation of unsigned fixed-point numbers obtained through numerical quantization, thereby minimizing the data volume and the calculation amount desirable by the neural network decoders, so as to better meet the requirement of real-time error correction.

PERMUTATION SELECTION FOR DECODING OF ERROR CORRECTION CODES

Disclosed herein is a neural network based pre-decoder comprising a permutation embedding engine, a permutation classifier each comprising one or more trained neural networks and a selection unit. The permutation embedding engine is trained to compute a plurality of permutation embedding vectors each for a respective one of a plurality of permutations of a received codeword encoded using an error correction code and transmitted over a transmission channel subject to interference. The permutation classifier is trained to compute a decode score for each of the plurality of permutations expressing its probability to be successfully decoded based on classification of the plurality of permutation embedding vectors coupled with the plurality of permutations. The selection unit is configured to output one or more selected permutations having a highest decode score. One or more decoders may be then applied to recover the encoded codeword by decoding the one or more selected permutations.

Recurrent neural networks and systems for decoding encoded data
11424764 · 2022-08-23 · ·

Examples described herein utilize multi-layer neural networks, such as multi-layer recurrent neural networks to decode encoded data (e.g., data encoded using one or more encoding techniques). The neural networks and/or recurrent neural networks have nonlinear mapping and distributed processing capabilities which are advantageous in many systems employing the neural network decoders and/or recurrent neural networks. In this manner, neural networks or recurrent neural networks described herein are used to implement error correction coding (ECC) decoders.

ELECTRONIC DEVICE
20220263524 · 2022-08-18 ·

Provided herein may be an electronic device using an artificial neural network. The electronic device may include a training data generator configured to determine an input vector corresponding to a trapping set, detected during error correction decoding corresponding to a codeword, and a target vector corresponding to the input vector, and a training component configured to train an artificial neural network based on supervised learning by inputting the input vector to an input layer of the artificial neural network and by inputting the target vector to an output layer of the artificial neural network.

MACHINE-LEARNING ERROR-CORRECTING CODE CONTROLLER

A machine-learning (ML) error-correcting code (ECC) controller may include a hard-decision (HD) ECC decoder optimized for high-speed data throughput, a soft-decision (SD) ECC decoder optimized for high-correctability data throughput, and a machine-learning equalizer (MLE) configured to variably select one of the HD ECC decoder or the SD ECC decoder for data throughput. An embodiment of the ML ECC controller may provide speed-optimized HD throughput based on a linear ECC. The linear ECC may be a soft Hamming permutation code (SHPC).

Apparatus and method for optimizing physical layer parameter

An apparatus and method for optimizing a physical layer parameter is provided. According to one embodiment, an apparatus includes a first neural network configured to receive a transmission environment and a block error rate (BLER) and generate a value of a physical layer parameter; a second neural network configured to receive the transmission environment and the BLER and generate a signal to noise ratio (SNR) value; and a processor connected to the first neural network and the second neural network and configured to receive the transmission environment, the generated physical layer parameter, and the generated SNR, and to generate the BLER.