A method for execution by one or more processing modules to configure a programmable drive-sense unit (DSU) includes determining one or more load sensing objectives based on sensing a load using the DSU that is configured to drive and simultaneously to sense the load via a single line. The method further includes determining one or more data processing objectives associated with sensing the load. The method further includes determining desired characteristics for the output data associated with sensing the load. The method further includes determining operational parameters for the DSU based on one or more of the load sensing objectives, the data processing objectives, and the desired characteristics for the output data. The method further includes configuring the DSU based on the operational parameters to achieve the one or more load sensing objectives.

A mixer for generating an analog output signal X.sub.OUT from an analog input signal X.sub.IN using a mixing signal having a mixing frequency f.sub.MIX, the mixer comprising: a scaler being configured to sample the analog input signal X.sub.IN at a plurality of discrete points in time k with a sampling frequency f.sub.S to obtain a sampled analog input signal X.sub.IN[k] having a continuous signal value, and to generate the analog output signal X.sub.OUT having a continuous signal value by scaling the sampled analog input signal X.sub.IN[k] on the basis of a plurality of scaling coefficients A[k], wherein the scaling coefficients A[k] are a time-discrete representation of the mixing signal.

Disclosed herein is a roadside unit with a radio frontend port configured to receive a first signal representing a radiofrequency transmission according to a first radio communication protocol, to receive a second signal representing a radiofrequency transmission according to a second radio communication protocol. A first processing subsystem configured to execute a first baseband process of the first radio communication protocol on the first signal and to generate a first output signal as an output of the first baseband process. A second processing subsystem configured to execute a baseband process of the second radio communication protocol on the second signal and to generate a second output signal as an output of the second baseband process. The first processing subsystem is a first software containerization or a first machine virtualization of the processor, wherein the second processing subsystem is a second software containerization or a second machine virtualization of the processor.

A semiconductor device comprising at least one transmit path is provided. The transmit path comprises an input node for receiving a digital baseband signal. Further, the transmit path comprises digital mixer circuitry coupled to the input node and configured to generate an upconverted digital baseband signal by upconverting a frequency of the digital baseband signal. Additionally, the transmit path comprises Digital-to-Analog Converter (DAC) circuitry coupled to the digital mixer circuitry and configured to generate an analog radio frequency signal based on the upconverted digital baseband signal. The transmit path comprises first analog mixer circuitry coupleable to an output of the DAC circuitry, and second analog mixer circuitry coupleable to the output of the DAC circuitry. Further, the transmit path comprises a first output node coupleable to an output of the first analog mixer circuitry, and a second output node coupleable to an output of the second analog mixer circuitry.

A transmission method is performed by a transmitter including antenna elements. The transmission method includes: generating a digital calibration signal; performing digital-to-analog conversion on second digital signals to generate first analog signals, the second digital signals being obtained by adding the digital calibration signal to each of a plurality of first digital signals each corresponding to respective one of the antenna elements; performing analog-to-digital conversion on the first analog signals to generate third digital signals each corresponding to respective one of the antenna elements, the first analog signals each passing through respective one of the antenna elements; performing correlation calculation between the digital calibration signal and each of the third digital signals to calculate transmission delay characteristics each corresponding to respective one of the antenna elements; calculating transmission delay correction amounts based on the transmission delay characteristics; and correcting the transmission delay characteristics based on the transmission delay correction amounts.

A photonic analog to digital converter (pADC) includes an electronic I/Q generator, an optical sampler, and an optical detector. The electronic I/Q generator is configured to receive an RF signal and to generate an electronic in-phase signal I and an electronic quadrature-phase signal Q based on the received RF signal. The optical sampler includes one or more optical intensity modulators configured to receive the electronic I and Q signals from the electronic I/Q generator, and to modulate optical pulses to provide modulated optical I and Q signals based on the received electronic I and Q signals from the electronic I/Q generator. The optical detector includes a plurality of photodetectors, and is arranged to receive the modulated optical I and Q signals from the optical sampler and to convert the modulated optical I and Q signals into modulated electronic I and Q signals.

A method executable by a low voltage drive circuit (LVDC) includes receiving an analog receive signal, converting the analog receive signal into analog inbound data, converting the analog inbound data into digital inbound data, filtering the digital inbound data to produce filtered digital data, sampling and holding an n-bit digital value of the filtered digital data to produce an n-bit sampled digital data value, adjusting formatting of the n-bit sampled digital data value to produce a formatted digital value, and generating a packet of received digital data from a plurality of formatted digital values.

A transmission/reception system includes: a second transmission/reception device configured to convert a multiplexed signal into a first digital signal in a first format, convert the signal into a first analog signal, and convert the signal into a second optical signal, and convert a first electrical signal into a second digital signal, demodulate the signal to generate a third digital signal, and output a plurality of sixth optical signals; and third transmission/reception device configured to convert a second electrical signal into a fourth digital signal, and demodulate the signal to generate a plurality of fifth digital signals; and convert a plurality of sixth digital signals into a seventh digital signal in a second format, convert the signal into a second analog signal, and convert the signal into a fourth optical signal.

The present disclosure relates to a digital frontend system for a radio device comprising a digital filter arranged for receiving digital quadrature signals and for filtering the digital quadrature signals and for outputting filtered quadrature signals; a conversion circuit arranged for receiving the filtered quadrature signals and for performing a rectangular to polar conversion of the filtered quadrature signals and for outputting a plurality of polar signals, characterized in that, the plurality of polar signals comprising an amplitude signal and quadrature phase signals.

A selective filtering module is arranged to filter or process the digital baseband signal consistent with a target receiving bandwidth, where the selective filtering module comprises a narrowband rejection filter and wide-band filter configured to reject an interference component that interferes with the received radio frequency signal. The narrowband rejection filter is configured to reject a first interference component, where the narrowband rejection filter comprises an adaptive notch filter (NF). The wide band rejection filter is configured to reject a second interference component in accordance with a pulse blanking technique. An electronic data processor is adapted to control one or more filter coefficients of narrowband rejection filter and the wide band rejection filter in accordance with one or more strategic filter control factors among ADC saturation, activation/deactivation of the notch filter, and a wide-band spectrum analysis.