H04B1/0028

DSP assisted and on demand RF and analog domain processing for low power wireless transceivers

A wireless user equipment (UE) device may include a receiver and transmitter. The UE device may dynamically vary the fidelity requirements imposed on the analog signal processing performed by the receiver and/or the transmitter in response factors such as: amount of signal interference (e.g., out-of-band signal power); modulation and coding scheme; number of spatial streams; extent of transmitter leakage; and size and/or frequency location of resources allocated to the UE device. Thus, the UE device may consume less power on average than a UE device that is designed to satisfy fixed fidelity requirements associated with a worst case reception scenario and/or a worst case transmission scenario.

Channel estimation method and system for IQ imbalance and local oscillator leakage correction

A channel estimation method and system for IQ imbalance and local oscillator leakage correction, wherein an example of a channel estimation system comprising a calibrating signal generator configured to generate at least one pair of calibrating signals, a feedback IQ mismatch estimator configured to measure feedback IQ mismatch estimates based on the pair of calibrating signals, and a calibrating signal based channel estimator configured to generate a channel estimate based on the pair of calibrating signals and the feedback IQ mismatch estimates.

MODULATION DEVICE, CONTROLLING METHOD OF MODULATION DEVICE AND VEHICLE

A modulation device includes: a communication unit; and a controller configured to: divide a communication signal received by the communication unit into a plurality of frequency bands, determine at least one noise band including a noise signal among the plurality of frequency bands, and generate an output signal by replacing at least one of the plurality of frequency bands corresponding to the noise band with another frequency band.

Mapping circuit and method for selecting cells of a multi core hybrid I/Q digital to analog converter
10797719 · 2020-10-06 · ·

A mapping circuit (300) for selecting cells of a multi core hybrid I/Q digital to analog converter includes a first sub-mapping circuit (310a) configured to define a first group of cores for each data symbol to be transmitted and to select cells of the first group of cores for an I-code of the data symbol to be transmitted. The mapping circuit (310b) further includes a second sub-mapping circuit configured to define a second group of cores for each data symbol and to select cells of the second group of cores for a Q-code of the data symbol.

RECONFIGURABLE HYBRID BEAMFORMING MIMO RECEIVER WITH INTER-BAND CARRIER AGGREGATION AND RF-DOMAIN LMS WEIGHT ADAPTATION
20200313749 · 2020-10-01 ·

A reconfigurable, multi-band hybrid beamforming architecture is introduced. The present invention is related to a Cartesian-Combining architecture to efficiently implement RF beamforming for a single downconversion chain employing direct downconversion in which the Cartesian-Combining architecture is extended to hybrid beamforming and to heterodyne downconversion.

MULTI-CHIP APPARATUS AND ELECTRONIC DEVICE
20240014843 · 2024-01-11 ·

The present disclosure relates to multi-chip apparatuses and electronic devices. One example multi-chip apparatus includes a first chip with a first internal signal generator and a first frequency multiplier, and a second chip with a second internal signal generator and a second frequency multiplier. The second frequency multiplier includes a first receiving circuit, a second receiving circuit, and a load circuit, where an input end of the first receiving circuit is coupled to an output end of the first internal signal generator, an input end of the second receiving circuit is coupled to an output end of the second internal signal generator, and an output end of the first receiving circuit and an output end of the second receiving circuit are coupled to an input end of the load circuit.

Poly phased, time-interleaved RF-DAC for multi-function frequency-agile, tunable transmitter

In accordance with various embodiments of the disclosed subject matter, a system, apparatus and method is configured to provide a poly-phased, time-interleaved radio frequency (RF) digital-to-analog converter (DAC) suitable for use in radar, radio, mobile and other RF systems.

Receiver, transmitter and correction circuit thereof
20200274565 · 2020-08-27 ·

A device includes a baseband circuit that generates a first digital signal, a digital-to-analog converter (DAC) that converts the first digital signal into a baseband signal, a first mixer that generates a first mixed signal based on the baseband signal and a first reference signal, a second mixer that generates a second mixed signal based on the baseband signal and a second reference signal, a third mixer that generates a down-converted signal based on the first mixed signal and the second mixed signal, and an analog-to-digital converter (ADC) that converts the down-converted signal into a second digital signal. The frequency of the first reference signal is different from the frequency of the second reference signal.

POLY PHASED, TIME INTERLEAVED RF DAC FOR MULTI FUNCTION FREQUENCY AGILE, TUNABLE TRANSMITTER

In accordance with various embodiments of the disclosed subject matter, a system, apparatus and method is configured to provide a poly-phased, time-interleaved radio frequency (RF) digital-to-analog converter (DAC) suitable for use in radar, radio, mobile and other RF systems.

Series voltage regulation modulating power supply

Certain aspects of the present disclosure provide methods and apparatus for series voltage regulation in an envelope tracking modulated supply. One example of an envelope tracking modulated supply includes a switched-mode power supply (SMPS), a voltage regulator, and a power amplifier having a supply input coupled to an output of the first voltage regulator. In certain aspects, the first voltage regulator is coupled in series between the power amplifier and two or more outputs the SMPS and is configured to generate a voltage at the output of the first voltage regulator based on an envelope of a signal to be amplified by the first power amplifier.