An audio processing apparatus includes a linear processing stage and control signal circuitry (CSC). The linear processing stage is configured to receive an input audio signal, and to linearly process the input audio signal based on a user-provided setting of the linear processing stage, so as to produce a linear stage output audio signal. The control signal circuitry (CSC), which is configured to (a) generate a control signal based on (i) the user-provided setting of the linear stage and (ii) a prespecified signal quality preserving criterion, and (b) control the linear stage output audio signal with the control signal, so as to produce a controlled audio signal, in compliance with the signal quality preserving criterion.

An audio processing apparatus includes a linear processing stage and control signal circuitry (CSC). The linear processing stage is configured to receive an input audio signal, and to linearly process the input audio signal based on a user-provided setting of the linear processing stage, so as to produce a linear stage output audio signal. The control signal circuitry (CSC), which is configured to (a) generate a control signal based on (i) the user-provided setting of the linear stage and (ii) a prespecified signal quality preserving criterion, and (b) control the linear stage output audio signal with the control signal, so as to produce a controlled audio signal, in compliance with the signal quality preserving criterion.

A passive equalizer is provided. The passive equalizer includes a first resistive element, a first inductive element, a second resistive element, and a first variable capacitor. The first resistive element is coupled between an input node and an output node. The first inductive element and the second resistive element are coupled in series between the output node and a first voltage supply node. The first variable capacitor is coupled between the input node and a first node located between the first inductive element and the second resistive element.

An electronic device includes a signal sender that sends a pair of transmission signals of mutually opposite phases to an external device via a pair of transmission paths. The signal sender differentiates each amplitude of the pair of transmission signals.

An electronic device includes a signal sender that sends a pair of transmission signals of mutually opposite phases to an external device via a pair of transmission paths. The signal sender differentiates each amplitude of the pair of transmission signals.

A semiconductor integrated circuit according to an embodiment includes an A/D converter, first and second equalizer circuits, and first and second controllers. The first equalizer circuit includes a first tap. The first and second equalizer circuits receive a signal based on a digital signal, and output first and second signals, respectively. The first controller adjusts a phase of a clock signal based on the first signal. The second controller an operation of adjusting a control parameter including a tap coefficient. In the operation, the second controller adjusts a tap coefficient of each of taps of the second equalizer circuit, and adjusts a tap coefficient of the first tap based on an adjustment result of each tap coefficient of the second equalizer circuit.

A circuit for blocking undesired input direct current of AC-coupled broadband circuits. The circuit includes a capacitor coupled to an input port and a common node. The input port receives a RF input signal. Additionally, the circuit includes a current source supplying a DC current to the common node leading a bias current to an output port. Further, the circuit includes a variable voltage source through an internal load and a close loop with an application circuit having an input load coupled to the output port to determine various bias voltages to control the bias current at the output port in association with a RF output signal that is substantially free of any input direct current originated from the RF input signal and is associated with an inherent low cut-off frequency independent of the various bias voltages.

A distortion compensation system includes a first communication node including a first reception unit including an equalizer configured by a first digital filter unit and a first transmission unit including an emphasis circuit configured by a second digital filter unit, and a second communication node including a second transmission unit transmitting a training pattern before receiving normal data from the first communication node. The equalizer converges a filter constant of the first digital filter unit so that an error of the received training pattern is converged. The first transmission unit performs a distortion compensation using the converged filter constant of the first digital filter unit as at least a part of a filter constant of the second digital filter unit of the emphasis circuit, and then transmits the data.

A distortion compensation system includes a first communication node including a first reception unit including an equalizer configured by a first digital filter unit and a first transmission unit including an emphasis circuit configured by a second digital filter unit, and a second communication node including a second transmission unit transmitting a training pattern before receiving normal data from the first communication node. The equalizer converges a filter constant of the first digital filter unit so that an error of the received training pattern is converged. The first transmission unit performs a distortion compensation using the converged filter constant of the first digital filter unit as at least a part of a filter constant of the second digital filter unit of the emphasis circuit, and then transmits the data.

An optical network is disclosed which includes an optical fiber shared by a plurality of transmitters using code division multiple access techniques. The transmitters are connected by tributary optical fibers to the shared optical fiber. In code division multiple access techniques, each communication is encoded with a distinctive code which enables a receiver to extract the communication intended for it from amongst communications intended for other receivers. It is found that synchronizing the communications on the optical fiber improves the ability of a receiver to extract the communication intended for it. Injecting an optical pulse signal into the optical network, and using the tributary optical fibers to carry the clock signal to the transmitters provides an inexpensive method of synchronizing the transmitters which feed signals onto the optical fiber. The technology is of use in optical networks, and other transmission line networks, and is well-suited to use in local area networks.