Embodiments of the present disclosure utilizes the natural properties of RFI noise on a wireline link. Since differential RFI noise in the system has some correlation with the common mode noise on the cable, a replica of RFI noise can be regenerated by an adaptive filter based on information about the common mode noise. The replica RFI is subtracted from the equalizer output prior to the data decision circuitry or slicer. In this method, the system does not require expensive cable, nor does the equalizer suffer additional loss due to an RFI notch filter. Since RFI can be detected and mitigated, this information can also be coupled to safety systems to increase functional safety under high EMI conditions.

Embodiments of the present disclosure utilizes the natural properties of RFI noise on a wireline link. Since differential RFI noise in the system has some correlation with the common mode noise on the cable, a replica of RFI noise can be regenerated by an adaptive filter based on information about the common mode noise. The replica RFI is subtracted from the equalizer output prior to the data decision circuitry or slicer. In this method, the system does not require expensive cable, nor does the equalizer suffer additional loss due to an RFI notch filter. Since RFI can be detected and mitigated, this information can also be coupled to safety systems to increase functional safety under high EMI conditions.

A common-mode in-line radio frequency (RF) filter isolator includes one or more modules that incorporate a respective RF filter circuit. The one or more modules are configured to be electrically coupled in-line with a communication link, such as an Ethernet cable for example. Accordingly, the filter isolator device is enabled to reduce or eliminate the presence of common-mode noise that is present on the network communication link.

An electronic communication device comprises a first transceiver capable of a bi-directional communication session on a first communication medium; a second transceiver capable of a bi-directional communication session on a second communication medium; and a control logic coupled to the first transceiver and the second transceiver and capable of implementing a convergence layer, wherein the control logic is configured to receive, from the first transceiver, a first signal; and cause, in response to the first signal, data received and transmitted by the first transceiver on the first communication medium as part of a communication session to be received and transmitted instead by the second transceiver on the second communication medium.

An electronic communication device comprises a first transceiver capable of a bi-directional communication session on a first communication medium; a second transceiver capable of a bi-directional communication session on a second communication medium; and a control logic coupled to the first transceiver and the second transceiver and capable of implementing a convergence layer, wherein the control logic is configured to receive, from the first transceiver, a first signal; and cause, in response to the first signal, data received and transmitted by the first transceiver on the first communication medium as part of a communication session to be received and transmitted instead by the second transceiver on the second communication medium.

A signal transmitting circuit and a signal receiving circuit for serial communication, and an electronic device are provided. The signal transmitting circuit includes a control module, a first transmitter, a second transmitter, a first differential pin, and a second differential pin, wherein the control module is configured to control the first transmitter to output a first signal via the first differential pin, and control the second transmitter to output a second signal via the second differential pin to record target information with a target signal after differentiating between the first signal and the second signal; and wherein if the target information includes data information and instant information, the data information is recorded in the target signal with a third signal with a first frequency while recording the instant information with a fourth signal with a second frequency, the first frequency is different from the second frequency.

A signal transmitting circuit and a signal receiving circuit for serial communication, and an electronic device are provided. The signal transmitting circuit includes a control module, a first transmitter, a second transmitter, a first differential pin, and a second differential pin, wherein the control module is configured to control the first transmitter to output a first signal via the first differential pin, and control the second transmitter to output a second signal via the second differential pin to record target information with a target signal after differentiating between the first signal and the second signal; and wherein if the target information includes data information and instant information, the data information is recorded in the target signal with a third signal with a first frequency while recording the instant information with a fourth signal with a second frequency, the first frequency is different from the second frequency.

Systems and methods are provided for use of common mode rejection (CMR) for echo cancellation in uplink communications. A node in a cable network configured for transmitting downstream (DS) signals and receiving upstream (US) signals, may include echo cancelling circuits configured for cancelling echo introduced by the DS signals and/or transmittal of the DS signals, onto US signals and/or US reception path, to facilitate full-duplex (FDX) communications of the DS signals and US signal. The echo cancelling circuits may be configured for operating in the analog domain. The echo cancelling circuits may include an echo cancelling combiner configured for combining two or more upstream signals non-coherently.

Systems and methods are provided for use of common mode rejection (CMR) for echo cancellation in uplink communications. A node in a cable network configured for transmitting downstream (DS) signals and receiving upstream (US) signals, may include echo cancelling circuits configured for cancelling echo introduced by the DS signals and/or transmittal of the DS signals, onto US signals and/or US reception path, to facilitate full-duplex (FDX) communications of the DS signals and US signal. The echo cancelling circuits may be configured for operating in the analog domain. The echo cancelling circuits may include an echo cancelling combiner configured for combining two or more upstream signals non-coherently.

Systems and methods for signal boosting in serial interfaces are provided. In some implementations, a system for boosting signals comprises boosting circuitry. The boosting circuitry may comprise at least one boosting capacitor configured to be operatively coupled to a voltage supply during a charging phase and configured to be operatively coupled to the at least one line of a signal transmission line during a discharging phase, wherein, during the discharging phase, the at least one boosting capacitor boosts a voltage of the one or more signals transmitted on the at least one line. The boosting circuitry may comprise switching circuitry configured to switch the at least one boosting capacitor between from being operatively coupled to the voltage supply to being operatively coupled to the at least one line of the signal transmission line.