The present invention is directed to data communication systems and techniques thereof. More specifically, embodiments of the present invention provide an FEC encoder that generates parity symbols that are embedded into FEC blocks. An FEC decoder determines whether to perform error correction based on the parity symbols. When performing error correction, the decoder selects a worst symbol from a segment of symbols, and the worst symbol is corrected. There are other embodiments as well.

A transmitter includes: a pulse amplitude modulation encoder that encodes serial data to multi-bit transmission data of a first data group and a second data group; a first driver that converts first multi-bit transmission data of the first data group to a first differential signal having a first voltage swing width; a second driver that converts second multi-bit transmission data of the second data group to a second differential signal having a second voltage swing width narrower than the first voltage swing width; a first voltage regulator that provides to the second driver a first low swing voltage for generating the second differential signal; a second voltage regulator that provides to the second driver a second low swing voltage less than the first low swing voltage; and a constant current load switch that provides a current path between the first and second voltage regulators depending on deactivation of the second driver.

A communication system in which multiple shaping codes are selectively and iteratively used to encode a data frame such that possible energy inefficiencies associated with the use of constant-probability codes and/or transmission of dummy constellation symbols can be relatively small. In an example embodiment, the used shaping codes have different respective code rates, and a code selector of the shaping encoder operates to select one of the shaping codes by adaptively matching the rate of the code to the effective rate needed to efficiently encode the unprocessed portion of the data frame. The encoding is carried out in a manner that enables the shaping decoder to unequivocally determine the shaping codes that have been used for encoding each particular data frame based on the same rate-matching criteria as those used by the shaping encoder. At least some embodiments advantageously lend themselves to being implemented using circuits of relatively low complexity.

The present invention is directed to data communication systems and techniques thereof. More specifically, embodiments of the present invention provide an FEC encoder that generates parity symbols that are embedded into FEC blocks. An FEC decoder determines whether to perform error correction based on the parity symbols. When performing error correction, the decoder selects a worst symbol from a segment of symbols, and the worst symbol is corrected. There are other embodiments as well.

A jitter determination method for determining at least one jitter component of an input signal is described, wherein the input signal is generated by a signal source, comprising: receiving and/or generating probability data containing information on a collective probability density function of a random jitter component of the input signal and a other bounded uncorrelated jitter component of the input signal; determining a standard deviation of the random jitter component based on the probability data; determining a RJ probability density function associated with the random jitter component based on the standard deviation; and determining a OBUJ probability density function associated with the other bounded uncorrelated jitter component, wherein the OBUJ probability density function is determined based on the probability data and based on the probability density function that is associated with the random jitter component. Further, a measurement instrument is described.

Methods, systems, and devices related to a memory system or scheme that includes a first memory device configured for low-energy access operations and a second memory device configured for storing high-density information and operations of the same are described. The memory system may include an array configured for high-density information and may interface with a host via a controller and a cache or another array of a relatively fast memory type. The memory system may support signals communicated according to one or several modulation schemes, including a modulation scheme or schemes that employ two, three, or more voltage levels (e.g., NRZ, PAM4). The memory system may include, e.g., separate channels configured to communicate using different modulation schemes between a host and between memory arrays or memory types within the memory system.

Methods of operating a serial data bus divide series of data bits into sequences of one or more bits and encode the sequences as N-level symbols, which are then transmitted at multiple discrete voltage levels. These methods may be utilized to communicate over serial data lines to improve bandwidth and reduce crosstalk and other sources of noise.

Communication systems are described that use signal constellations, which have unequally spaced (i.e. geometrically shaped) points. In many embodiments, the communication systems use specific geometric constellations that are capacity optimized at a specific SNR. In addition, ranges within which the constellation points of a capacity optimized constellation can be perturbed and are still likely to achieve a given percentage of the optimal capacity increase compared to a constellation that maximizes d.sub.min, are also described. Capacity measures that are used in the selection of the location of constellation points include, but are not limited to, parallel decode (PD) capacity and joint capacity.

A PAM (Pulse Amplitude Modulation) modulator driver is configured to receive a PAM input signal having N input amplitude levels and provide a PAM output signal having N output amplitude levels, where N is an integer. The PAM modulator driver circuit configured to electrically adjust amplitude levels in the PAM output signal.

A communication system in which a constellation employing partially anti-symmetric amplitude labels is used to transmit probabilistically shaped amplitudes such that said amplitudes are also used to determine the signs applied thereto for transmission. In an example embodiment, a data transmitter is configured to use a suitable logic function (e.g., an XOR function) to place the parity generated by an FEC code into a selected amplitude bit while using the partially anti-symmetric amplitude labels to avoid placing the parity into the sign bits of the transmitted constellation symbols. In some embodiments, the FEC code can be a low-density parity-check code. Some embodiments are compatible with layered FEC coding, e.g., employing an outer FEC code and an inner FEC code. In some embodiments, FEC coding may be optional. Some embodiments can advantageously be used in communication systems relying on DMT modulation, such as the systems providing DSL access over copper wiring.