Aspects of the present disclosure relate to a wireless device including one or more processors and a memory storing processor-readable instructions that, when executed by the one or more processors, causes the wireless device to perform operations. The operations include receiving a first message indicating a reuse transmission opportunity associated with a downlink transmission from a first device to a second device. The operations further include determining to participate in the reuse transmission opportunity based at least in part on the downlink transmission. The operations further include, during the reuse transmission opportunity, transmitting uplink communications to the first device concurrently with the downlink transmission from the first device to the second device in the same frequency channel.

An apparatus for monitoring a signal path is provided. The signal path includes a first processing unit, which generates a first signal based on an input signal of the signal path, and a second processing unit, which generates an output signal of the signal path, wherein the output signal depends on the first signal. The apparatus includes an output estimation module configured to determine an estimated output signal of the second processing unit based on the input signal. Further, the apparatus includes a comparison module configured to determine a state of the signal path based on a deviation of the output signal from the estimated output signal.

An apparatus comprises a plurality of sampling circuits configured to receive a non-Non Return to Zero (non-NRZ) data signal; and a control circuit coupled to the plurality of sampling circuits, wherein the control circuit is configured to provide one or more control signals indicating whether to decrease or increase a frequency of a clock signal associated with the non-NRZ data signal based on the non-NRZ data signal.

A communication system is configured to use a pulse width modulation signal as transmission code among a plurality of nodes connected to a communication line. A master node includes a transmission transistor connected to the communication line, a detector configured to detect a variation in current during the on-period of the transmission transistor, and a communication circuit configured to determine the off-timing of the transmission transistor based on the timing of occurrence of the variation in current (i.e., the on-timing of a second transmission transistor provided in a slave node). For example, the communication circuit can be configured to determine the off-timing of the transmission transistor such that the simultaneously-on period TB of the transmission transistor and the second transmission transistor fulfills TB=(2n?1)/2f, where f is the frequency of EMI noise.

A communication system for current-modulated transmission of data via a current loopinto which a master device and at least one slave device are looped. The at least one slave device has a switching means that is actuable by an evaluation and control unit and that is configured to short a current loop in the closed state, wherein the evaluation and control unit is configured to temporarily close and then reopen the switching means during a system configuration detection phase. An evaluation and control unit of the master deviceis configured to detect when the at least one slave device is looped into the current loop.

An apparatus comprises a plurality of sampling circuits configured to receive a non-Non Return to Zero (non-NRZ) data signal; and a control circuit coupled to the plurality of sampling circuits, wherein the control circuit is configured to provide one or more control signals indicating whether to decrease or increase a frequency of a clock signal associated with the non-NRZ data signal based on the non-NRZ data signal.

An apparatus comprises a plurality of sampling circuits configured to receive a non-Non Return to Zero (non-NRZ) data signal; and a control circuit coupled to the plurality of sampling circuits, wherein the control circuit is configured to provide one or more control signals indicating whether to decrease or increase a frequency of a clock signal associated with the non-NRZ data signal based on the non-NRZ data signal.

An apparatus comprises a plurality of sampling circuits configured to receive a non-Non Return to Zero (non-NRZ) data signal; and a control circuit coupled to the plurality of sampling circuits, wherein the control circuit is configured to provide one or more control signals indicating whether to decrease or increase a frequency of a clock signal associated with the non-NRZ data signal based on the non-NRZ data signal.

An apparatus comprises a plurality of sampling circuits configured to receive a non-Non Return to Zero (non-NRZ) data signal; and a control circuit coupled to the plurality of sampling circuits, wherein the control circuit is configured to provide one or more control signals indicating whether to decrease or increase a frequency of a clock signal associated with the non-NRZ data signal based on the non-NRZ data signal.

An apparatus comprises a plurality of sampling circuits configured to receive a non-Non Return to Zero (non-NRZ) data signal; and a control circuit coupled to the plurality of sampling circuits, wherein the control circuit is configured to provide one or more control signals indicating whether to decrease or increase a frequency of a clock signal associated with the non-NRZ data signal based on the non-NRZ data signal.