An output signal generation device includes: two or more signal output blocks that each include two or more serial output circuits and a signal multiplex unit, the serial output circuits controlling amplitudes of data signals having different delay times and each outputting a first serial signal, the signal multiplex unit electrically multiplexing the first serial signals outputted from the two or more serial output circuits, and output a second serial signal obtained by electrical multiplex of the signal multiplex unit; and a phase correction unit that controls a phase of the second serial signal outputted from the two or more signal output blocks by changing the amplitude of the first serial signal outputted from the serial output circuit.

A method, for calibrating signal processing devices in an interface circuit coupled to a host device, comprises: negotiating with the host device in a link up process about an operation mode for the interface circuit to operate in a calibration procedure; and calibrating a characteristic value of a first signal processing device and a characteristic value of a second signal processing device in the calibration procedure. The first signal processing device is disposed on a receiving signal processing path and configured to process a received signal and the second signal processing device is disposed on a transmitting signal processing path and configured to process a transmitting signal, and the interface circuit is configured to operate based on the operation mode in the calibration procedure.

A method, for calibrating signal processing devices in an interface circuit coupled to a host device, comprises: negotiating with the host device in a link up process about an operation mode for the interface circuit to operate in a calibration procedure; and calibrating a characteristic value of a first signal processing device and a characteristic value of a second signal processing device in the calibration procedure. The first signal processing device is disposed on a receiving signal processing path and configured to process a received signal and the second signal processing device is disposed on a transmitting signal processing path and configured to process a transmitting signal, and the interface circuit is configured to operate based on the operation mode in the calibration procedure.

An optical network system includes: a plurality of optical transmission devices, each includes a transmitting unit configured to superimpose, on a main signal to be transmitted, a monitoring signal of a different wavelength from wavelengths of other optical transmission devices, the wavelength differing from wavelengths for other optical transmission devices in the optical network system, and an extraction unit configured to extract monitoring signals from main signals received from the other optical transmission devices, wherein a failure occurrence section where a communication failure occurs is determined, based on the monitoring signals extracted by the extraction unit, among transmission sections between the respective optical transmission devices.

Mechanisms for providing multi-homing, comprising: a memory device; and at least one hardware processor coupled to the memory device and configured to: intercept a connection between a device and a server using a proxy; establish a first connection between the device and the proxy; create multiple second connections between the proxy and the server, wherein at least two of the multiple second connections use different connection types; receive a request for blocks of data from the device using the first connection; allocate the blocks of data across the multiple second connections; request the blocks of data from the server using the multiple second connections as allocated; receive the blocks of data from the server using the multiple second connections; and forward the blocks of data to the device using the first connection.

An integrated circuit, including: at least three integrated circuit portions mutually spaced on a single electrically insulating die, the integrated circuit portions being mutually galvanically isolated; and signal coupling structures on the die to allow communication of signals between the integrated circuit portions while maintaining the galvanic isolation therebetween.

In a method implemented in a communication device configured to transmit PHY data units via a communication channel, first data and second data is received. The first data is modulated according to a first constellation having a first number of constellation points, and the second data is modulated according to a second constellation having a second number of constellation points higher than the first number of constellation points. The first data and the second data is parsed to a plurality of spatial streams such that a first subset of the spatial streams includes at least some of the modulated first data but none of the modulated second data, and a second subset of the spatial streams includes at least some of the modulated second data but none of the modulated first data. A single PHY data unit that includes the plurality of spatial streams is generated.

A RXLOS deglitch apparatus for a receiver is provided. The RXLOS deglitch apparatus includes a sampler, an edge detecting unit and a finite state machine. The sampler receives a recovered clock, and samples a RXLOS signal according to the recovered clock. Consequently, a sampled RXLOS signal is generated. The edge detecting unit receives the RXLOS signal. When a logic level of the RXLOS signal is changed, an edge detection signal is activated by the edge detecting unit. The finite state machine receives the edge detection signal and the sampled RXLOS signal, generates an edge rest signal to control the edge detecting unit, and outputs a filtered RXLOS signal.

A RXLOS deglitch apparatus for a receiver is provided. The RXLOS deglitch apparatus includes a sampler, an edge detecting unit and a finite state machine. The sampler receives a recovered clock, and samples a RXLOS signal according to the recovered clock. Consequently, a sampled RXLOS signal is generated. The edge detecting unit receives the RXLOS signal. When a logic level of the RXLOS signal is changed, an edge detection signal is activated by the edge detecting unit. The finite state machine receives the edge detection signal and the sampled RXLOS signal, generates an edge rest signal to control the edge detecting unit, and outputs a filtered RXLOS signal.

A transmitting circuit includes: a multiplexer configured to output a third digital signal obtained by alternately synthesizing a first digital signal of a predetermined cycle length and a predetermined data rate with a second digital signal of the predetermined cycle length and the predetermined data rate; a first selector configured to output the first digital signal in a first state and output the third digital signal in a second state that is different from the first state; a second selector configured to output the second digital signal in the first state and output the third digital signal in the second state; a first driver circuit configured to output a signal corresponding to a signal output from the first selector; and a second driver circuit configured to output a signal corresponding to a signal output from the second selector.