A real-time computational device includes a programmable real-time processor, a communications input port which is connected to the programmable real-time processor through a first broadside interface, and a communications output port which is connected to the programmable real-time processor through a second broadside interface. Both broadside interfaces enable 1024 bits of data to be transferred across each of the broadside interfaces in a single clock cycle of the programmable real-time processor.

The present disclosure relates to a method for a terminal device to determine demodulation reference signal (DMRS), comprising: obtaining (211) a DMRS configuration and a corresponding signature assigned by a network side node; constructing (212) a DMRS according to the DMRS configuration; mapping (213) the DMRS to a physical channel assigned to the terminal device. The signature indicates a processing configuration for the physical channel. In the embodiments of the present disclosure, the signature, and DMRS configuration may be configured correspondingly, to obtain low-crosstalk DMRS signals for different terminal devices, thus, the number of the supported terminal devices may be improved.

A first communication device and a second communication device for an iterative code design are provided. The first communication device generates and transmits sets of parity symbols and receives the transmitted sets of parity symbols from a second communication device. The sets of parity symbols are generated based on using a first generator device and based previously transmitted systematic symbols and computed noise values. The second communication device buffers received systematic symbols and sets of parity symbols and jointly decodes them. Thereby, an iterative code design is provided with improved performance. Furthermore, the disclosure also relates to corresponding methods and a computer program.

A method is implemented by an ONU in a 50G-PON. The method comprises receiving an encoded DS PHY frame from an OLT, the encoded DS PHY frame comprises an FEC codeword, the FEC codeword comprises an SFC field and a payload, and the SFC field and the payload are encoded with a same FEC; decoding the FEC codeword using the FEC to obtain a decoded SFC field and the payload; performing a first verification of the decoded SFC field while in a sync state of a synchronization state machine; and staying in the sync state when the first verification is successful or exiting the sync state when the first verification is unsuccessful.

A method and a system for correcting cyclic redundancy check (CRC) for a frame with last bytes changed are provided. The method includes acquiring a data frame, calculating a CRC of a modified data frame, and determining a corrected CRC for the data frame based on at least the CRC of the modified data frame and a CRC correction field calculated on the bytes to be replaced at the end of the frame. An altered data frame includes the data frame with a number of last bytes of the data frame replaced with new bytes.

This application discloses image encoding and decoding methods and apparatuses. The image encoding method includes performing, by a source device, compression encoding on an image to obtain base layer information. The method further includes obtaining enhancement layer information based on the base layer information and the image. The method further includes obtaining control layer information. The method further includes performing encoding and modulation on the control layer information, the base layer information, and the enhancement layer information separately to obtain a plurality of symbol sets. The method further includes mapping the plurality of symbol sets to a resource for sending. Embodiments of this application may ensure robustness in a transmission process and improve overall compression efficiency and performance.

In one aspect, a method of wireless communication includes determining, by a user equipment (UE), one or more full-duplex symbols of a slot and one or more half-duplex symbols of the slot; determining, by the UE, to use a first type of interleaving for the one or more full-duplex symbols and a second type of interleaving for the one or more half-duplex symbols; frequency domain mapping, by the UE, virtual resources of the slot to physical resources of the slot based on the first type of interleaving and the second type of interleaving; and communicating, by the UE, based on the physical resources. Other aspects and features are also claimed and described.

A channel encoding method and apparatus. The method includes: obtaining A to-be-encoded information bits; mapping the A to-be-encoded information bits and L CRC bits to a first bit sequence based on an interleaving sequence, where the L CRC bits are obtained based on the A to-be-encoded information bits and a CRC polynomial, the interleaving sequence is obtained from a prestored interleaving sequence table or is obtained based on a maximum-length interleaving sequence, A+L is less than or equal to Kmax, and Kmax is a length of the maximum-length interleaving sequence; and encoding the first bit sequence. In this way, not only an encoding delay can be reduced, but also decoding has an early stop capability, so that decoding can end in advance, thereby reducing a decoding delay.

Transmitting or receiving an RF signal that carries a data unit, the data unit comprising a DATA field that includes a SERVICE field, the SERVICE field including a scrambler initialization field and a sequence of remaining bits scrambled based on a set of scrambler sequence initialization bits included in the scrambler initialization field, the SERVICE field containing a first set of one or more error detection bits that has been computed to enable error detection for at least a first group of bits included in the scrambler initialization field.

A radio communication link is established between first and second nodes in a cellular network, which comprise at least channel coding and decoding of first and second Physical Layer (PHY) and first and second Medium Access Control (MAC) sublayers.

User data is transmitted from the first node to the second node while applying a PHY Forward Error Correction (FEC) algorithm in transmission for coding and in reception for decoding by the first and second PHY layers.

It is computed a value of a PHY-FEC error metric with respect to errors in the user data received by the second node that are uncorrected by the PHY FEC algorithm.

The received user data including the uncorrected errors is transferred from the second PHY layer to the second MAC sublayer, subject to the value of the PHY-FEC error metric being less than a threshold used by an error tolerance procedure.