Patent classifications
H04L1/0045
DATA PROCESSING METHOD, APPARATUS, AND DEVICE
A data processing method, an apparatus, and a device. The data processing method may be performed by a first communication device, and the first communication device is a transmit end of encoded data. When simultaneously sending one or more data streams, the first communication device places information bits in a data stream in a specified order. A plurality of data streams may be arranged in a specified order, so that joint encoding without feeding back information can be implemented, and transmission close to a channel capacity can be implemented.
Apparatus for generating broadcast signal frame for signaling time interleaving mode and method using the same
An apparatus and method for generating a broadcast signal frame for signaling a time interleaving mode are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a time interleaver configured to generate a time-interleaved signal by performing time interleaving on a BICM output signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling a time interleaving mode corresponding to the time interleaver for each of physical layer pipes (PLPs).
Inter user interference control techniques
Aspects of the present disclosure implement techniques of a new 3D waveform coding scheme that leverages the spatial properties of 5G NR systems. Specifically, in 5G systems, each UE location may be characterized by three parameters: propagation delay (t.sub.p), angle of elevation (θ), and angle of azimuth (φ). Global coding matrix may be generated by linear combination of these three attributes and a unique lattice code may be generated for each UE at different locations from the base station. Thus, considering the coding gain increases with increasing the distance between the codes, aspects of the present disclosure take advantage of geometrical properties of lattice. Particularly, within the 3D waveform coding, if lattice distance between co-beamed UEs is determined to be greater than threshold radius, a conjugate lattice code for the UEs may be applied in accordance with aspects of the present disclosure.
Iterative decoding technique system and method for digital selective calling
System and methods are disclosed that comprise receiving at least one signal via a receiver. The at least one signal is extracted for data via a processor coupled to the receiver, wherein the data includes at least one message and a set of parameters related to the message. A signal output is generated using the at least one message and the set of parameters such that the signal output includes a first portion and a second portion. At least one error is identified in the signal output and corrected using the first portion and the second portion. An output is generated that is used to perform at least one task related to the at least one signal.
Transmitter, receiver, transmission method, and reception method
Provided is a base station with which it is possible to appropriately arrange a reference signal. In a base station (100), a control unit (101) determines a second threshold value on the basis of a first threshold value used in determining the arrangement of a reference signal. A transmission unit (105) transmits the reference signal arranged on the basis of the second threshold value.
Forward error correction for streaming data
A current frame in a sequence is encoded at a first bitrate to generate one or more encoded source frames. One or more previous frames in the sequence are encoded at a second bitrate that is lower than the first bitrate to generate one or more encoded FEC frames. The one or more encoded source frames and the one or more encoded FEC frames are packetized into one or more data packets.
Two-stage interleaving techniques for wireless communications
Methods, systems, and devices for wireless communications are described in which a two-stage interleaving pattern may be provided for communication of coded information via a channel. The channel may have a channel bandwidth within a bandwidth part (BWP) of a total frequency bandwidth, and the two-stage interleaving pattern may provide a first interleaving pattern of resource blocks within an allocated set of user equipment (UE) resources and a second interleaving pattern of resource blocks within the BWP. The two-stage interleaving pattern may be based on the first interleaving pattern being initially applied to resource blocks within the allocated set of UE resources, and the second interleaving pattern being subsequently applied to resource blocks within the BWP. Signaling to indicate a type of interleaving to be applied to a communication may be provided in semi-static signaling, dynamic signaling, or combinations thereof.
Rate-matching a data transmission around resources
Apparatuses, methods, and systems are disclosed for rate-matching a data transmission around resources. One method includes: receiving a downlink control channel (“DCC”) transmission in a predetermined time period; determining a first DCC candidate (“DCCC”) based on the downlink control channel transmission; determining whether the first DCCC belongs to a plurality of DCCCs associated with the DCC transmission, wherein the plurality of DCCCs carry the same downlink control information (“DCI”); in response to determining that the first DCCC belongs to the plurality of DCCCs: determining a second DCCC; and determining the DCI by decoding the first and the second DCCCs; in response to determining that the first DCCC does not belong to the plurality of DCCCs: determining the DCI by decoding the first DCCC; and determining downlink resources corresponding to a data transmission; and rate-matching the data transmission.
CYCLIC REDUNDANCY CHECK COMPUTATION CIRCUIT, COMMUNICATION UNIT, AND METHOD THEREFOR
A cyclic redundancy check, CRC, computation circuit comprising an input for receiving an input stream having an input bit sequence comprising two or more bits at a time aligned to rows of a CRC generator matrix stored in a Look Up Table, LUT; a set of two or more parallel processors configured to perform a CRC computation of the input bit sequence; wherein the LUT comprises a plurality of addresses wherein at least one of the addresses is configured to store two or more rows of the CRC generator matrix; and the set of parallel processors is configured to: combine LUT data with the input stream by using two or more bits of the aligned input stream to mask the two or more rows of the CRC generator matrix stored in the LUT; and combine generated two or more intermediate parity bit sequences into a single parity bit sequence.
Instruction-based multi-thread multi-mode PDSCH decoder for cellular data device
A cellular modem processor can include dedicated processing engines that implement specific, complex data processing operations. To implement physical downlink shared channel (PDSCH) decoding, a cellular modem can include a pipeline having multiple processing engines, with the processing engine including functional units that execute instructions corresponding to different stages in the PDSCH decoding process. Flow control and data synchronization between instructions can be provided using a hybrid of firmware-based flow control and hardware-based data dependency management.