Patent classifications
H04L2001/0094
METHODS AND SYSTEMS FOR HIGH BANDWIDTH COMMUNICATIONS INTERFACE
Systems and methods are described for transmitting data over physical channels to provide a high bandwidth, low latency interface between a transmitting device and a receiving device operating at high speed with low power utilization. Communication is performed using group signaling over sets of four wires using a vector signaling code, where each wire of a set carries a low-swing signal that may take on one of four signal values. Topologies and designs of wire sets are disclosed with preferred characteristics for group signaling communications.
Header parity error handling
A parity error is detected in a header, where the header is in a particular one of a plurality of queues, the header is to include a plurality of fields, and each of the queues is to correspond to a respective transaction type. Fabricated header data is generated for one or more of the plurality of fields to indicate the parity error and replace data of one or more of the plurality of fields. An error containment mode is entered based on the parity error.
Controller area network with flexible data-rate
In a method for serial communication of data frames between nodes connected by a bus system, the transmitter and receiver roles are assigned to the nodes for each data frame by the arbitration procedure defined in the CAN-Standard ISO 11898-1. The exchanged data frames, which include multiple bits, have a logical structure according to the CAN-Standard ISO 11898-1, including a Start-Of-Frame-Bit, an Arbitration Field, a Control Field, a Data Field, a CRC Field, an Acknowledge Field and an End-Of-Frame Field. Each bit has a bit time which is divided into Time Segments. In response to a predefined value of a specific bit within the Control Field a first node of a first node group restarts its protocol decoding state machine and waits until it has synchronized itself to the bus activity and a second node of a second node group communicates using CAN FD Specification protocol.
Data transmission using a protocol exception state
A method for exchanging data between nodes which are connected to each other by a bus system, in which messages that contain data are exchanged according to a first communication protocol; the messages are made up of a sequence of bits; at least one control bit having a predetermined position within the message, which is exchanged according to the first protocol, must have a predetermined value; for each message, one node has the role of transmitter and at least one other node, as receiver, receives the message and monitors the message for errors, wherein by transmission of the control bit having a value differing from the predetermined value, at least one first receiver is transferred into a protocol exception state, so that it suspends error monitoring, and the transmitter, after transmitting the control bit, begins to transmit further data according to a second protocol to at least one second receiver.
SUBSCRIBER STATION FOR A BUS SYSTEM, AND METHOD FOR CHECKING THE CORRECTNESS OF A MESSAGE
A user station for a bus system and a method for checking the correctness of a message, in which the user station includes a communication control unit for writing or reading at least one message for/from at least one further user station of the bus system, in which an exclusive, collision-free access by a user station to a bus line of the bus system is ensured at least intermittently, a checksum generator for generating a checksum for the message to detect bit errors in the message, and a configuration register for specifying the initialization value with which the checksum generator is to be preloaded to start the message, the initialization value being changeable as necessary even following a communication with the communication control unit.
Controller area network transceiver
A transceiver for sending and receiving data from a controller area network (CAN) bus is disclosed. The transceiver includes a microcontroller port, a transmitter and a receiver. The transceiver is configured to detect a CRC delimiter or an error signal in a CAN frame and after the detection, allow a microcontroller coupled with the microcontroller port to only send a predetermined data pattern until a bus idle is detected.
Method for Serially Transmitting a Frame from a Transmitter to at Least One Receiver and Participants of a Bus System via a Bus System
The disclosure relates to a method for serially transmitting frames from a transmitter to at least one receiver via a bus line and to a participant station for a bus system. In the method, stuff bits are integrated into the frame by the transmitter dependent on the values of multiple previous bits in order to generate additional signals edges. The transmitter of the frame counts the stuff bits which are integrated depending on the value of multiple previous bits, and information on the number of counted stuff bits is transmitted in the transmitted frames.
User station for a serial communication network and method for correcting individual errors in a message of a serial communication network
A user station for a serial communication network and a method for correcting individual errors in a message of a serial communication network are provided. The user station includes a communication control unit for creating a message, which is to be transmitted serially to at least one further user station of the communication network. The communication control unit is designed to subdivide the data of the message to be created into at least one data portion and to insert into each data portion bits of an error correction code, which ensures a correction of at least one error in the message.
USER STATION FOR A SERIAL BUS SYSTEM, AND METHOD FOR TRANSMITTING A MESSAGE IN A SERIAL BUS SYSTEM
A user station is described. The user station includes a communication control device for transmitting and/or receiving messages to/from a bus of a serial bus system, a format switchover checking unit for checking whether the communication control devices of the bus system have switched over the format of the messages from a first format in a first communication phase to a second format for a second communication phase, and a transceiver device which, for transmitting in the first format, generates a first bus state for a first digital data state of the messages and a second bus state for the second digital data state of the messages so that the second bus state can overwrite the first bus state. The transceiver device, for transmitting in the second format, generates different bus states so that the bus states for the different digital data states of the messages cannot overwrite one another.
HARDWARE BASED CYCLIC REDUNDANCY CHECK (CRC) RE-CALCULATOR FOR TIMESTAMPED FRAMES OVER A DATA BUS
A method and a system for correcting cyclic redundancy check (CRC) for a frame with last bytes changed are provided. The method includes acquiring a data frame, calculating a CRC of a modified data frame, and determining a corrected CRC for the data frame based on at least the CRC of the modified data frame and a CRC correction field calculated on the bytes to be replaced at the end of the frame. An altered data frame includes the data frame with a number of last bytes of the data frame replaced with new bytes.