A signal interpolation method is described. The method includes: receiving an analog input signal; digitizing the analog input signal received, thereby obtaining a digitized input signal having samples; determining a crossing of the digitized input signal with respect to a threshold that was set; and interpolating a signal between at least two successive samples, wherein the signal interpolated has two signal portions each having a linear slope, and wherein one of the signal portions crosses the threshold. A measurement instrument is also described.

A signal analysis method is described. The signal analysis method includes: receiving a time-and-value discrete input signal, the input signal being associated with a signal source; determining at least one jitter component of the input signal; determining a step response based on the input signal, the step response being associated with at least the signal source; determining a counter function based on the step response, the counter function being configured to cancel error terms in a finite-time transform of the step response to frequency domain; superposing the step response and the counter function, thereby obtaining a modified step response; and transforming the modified step response to frequency domain, thereby obtaining a transfer function being associated with at least the signal source. Further, a signal analysis module for analyzing a time-and-value discrete input signal being associated with a signal source is described.

A signal analysis method is described. The signal analysis method includes: receiving a time-and-value discrete input signal, the input signal being associated with a signal source; determining at least one jitter component of the input signal; determining a step response based on the input signal, the step response being associated with at least the signal source; determining a counter function based on the step response, the counter function being configured to cancel error terms in a finite-time transform of the step response to frequency domain; superposing the step response and the counter function, thereby obtaining a modified step response; and transforming the modified step response to frequency domain, thereby obtaining a transfer function being associated with at least the signal source. Further, a signal analysis module for analyzing a time-and-value discrete input signal being associated with a signal source is described.

A method for equalizing a wireless communication channel includes transmitting a data signal over a primary channel. During transmission of the data signal, a corresponding data signal is sent over a secondary channel. The information received from the secondary channel is compared to the information received from the primary channel and differences between the information received from each of the channels are observed. These differences are used as inputs to an equalizer algorithm that may be used to reduce distortion of the data signal sent over the primary channel.

The present invention is directed to circuits and communication. More specifically, a specific embodiment of the present invention provides a timing recovery device with two stages. The first stage generates a clock signal to sample the received waveform, and the second stage provides timing-jitter mitigation. The second stage includes a jitter mitigation circuit with coefficients a function of the instantaneous jitter estimate, in addition to a jitter estimation tracking loop consisting of an error generator, a timing error detector and a loop filter to compensate for timing jitter associated with the clock signal. There are other embodiments as well.

A system for transcoding a digital video stream using a transcoder includes receiving a digital video stream that includes an input video stream and extracting a first set of presentation time stamps from the input video stream which are stored in a table. The system transcodes the input video stream including the first set of presentation time stamps from an initial set of characteristics to a modified set of characteristics including a second set of presentation time stamps that are different from the first set of presentation time stamps. The system processes the second set of presentation time stamps of the transcoded video stream to determine if the second presentation time stamps include jitter, and based upon determining the second set of presentation time stamps include jitter modifying the second set of presentation time stamps based upon the first set of presentation time stamps in the table.

The present invention is directed to circuits and communication. More specifically, a specific embodiment of the present invention provides a timing recovery device with two stages. The first stage generates a clock signal to sample the received waveform, and the second stage provides timing-jitter mitigation. The second stage includes a jitter mitigation circuit with coefficients a function of the instantaneous jitter estimate, in addition to a jitter estimation tracking loop consisting of an error generator, a timing error detector and a loop filter to compensate for timing jitter associated with the clock signal. There are other embodiments as well.

A system for controlling equalization applied to a received signal comprising an equalizer configured to equalize on a received signal to generate an equalized signal, and a clock recovery module configured to recover a clock signal from the equalized signal or the received signal. A clock adjustment system is configured to receive the clock signal, and at least one control signal, to create a sampling clock signal. A filter is configured to filter the equalized signal to create a filtered signal. A sampling unit samples the filtered signal or the equalized signal such that the output of the sampling unit is provided to a controller. The controller is configured to receive and process the output of the sampling unit to generate a boost signal, and the controller is further configured to provide the boost signal to the equalizer to control the amount of equalization performed by the equalizer.

A jitter determination method for determining at least one jitter component of an input signal is described, wherein the input signal is generated by a signal source. The method comprises: receiving the input signal; determining a step response based on the decoded input signal, the step response being associated with at least the signal source; and determining a data dependent jitter signal based on the determined step response and based on the decoded input signal. Further, a measurement instrument is described.

A video encoding device (e.g., a wireless transmit/receive unit (WTRU)) may transmit an encoded frame with a frame sequence number using a transmission protocol. The video encoding device, an application on the video encoding device, and/or a protocol layer on the encoding device may detect a packet loss by receiving an error notification. The packet loss may be detected at the MAC layer. The packet loss may be signaled using spoofed packets, such as a spoofed NACK packet, a spoofed XR packet, or a spoofed ACK packet. A lost packet may be retransmitted at the MAC layer (e.g., by the encoding device or another device on the wireless path). Packet loss detection may be performed in uplink operations and/or downlink operations, and/or may be performed in video gaining applications via the cloud. The video encoding device may generate and send a second encoded frame based on the error notification.