Patent classifications
H04L7/0012
COMMUNICATION APPARATUS, METHOD, AND STORAGE MEDIUM
A communication apparatus includes a plurality of clocks configured to output signals indicating current times, a plurality of counter units configured to synchronize with the plurality of clocks using the signals indicating the current times output from the plurality of clocks, an instruction unit configured to give an instruction to acquire count values of the plurality of counter units, an acquisition unit configured to acquire the count values of the plurality of counter units based on the instruction from the instruction unit, and a calculation unit configured to calculate a difference between the acquired count values.
CLOCK RECOVERY TRAINING
Aspects of the disclosure provide for an apparatus. In some examples, the apparatus includes a clock generator, a clock data recovery (CDR) circuit, a state machine, and an adder. The clock generator is configured to determine a sampling clock based on a received input clock and a clock offset. The CDR circuit is configured to determine a phase of the input clock and determine CDR codes based on the determined phase and sampled data. The state machine is configured to record a first CDR code of the CDR codes at a first time, record a second CDR code of the CDR codes at a second time subsequent to the first time, and determine a calibrated offset based on the first CDR code and the second CDR code. The adder is configured to determine the clock offset according to the CDR codes and the calibrated offset.
FULL DUPLEX WIRELESS COMMUNICATION SYSTEM WITH SINGLE MASTER CLOCK
A base station and the customer premises equipment (CPE) transceivers are configured to use a single master clock for all frequency conversions. The modem of each CPE has a clock output and that output is connected to the upconverter in the transceiver uplink or to both the upconverter and the downconverter as required.
Digital Signal Processor/Network Synchronization
A system for synchronizing a local audio processing clock rate of a digital signal processor (DSP) to an audio clock rate of a network to which the DSP is connected. The system includes an adjustable clock synthesizer that is configured to establish the local audio processing clock rate of the DSP. The DSP is configured to generate events that are associated with the local audio processing clock rate of the DSP. The DSP is further configured to monitor the generated events over time and based on the monitored events cause the adjustable clock synthesizer to adjust the local audio processing clock rate of the DSP to better match the network audio clock rate.
REMOTE VEHICLE COMMUNICATIONS BITRATE DETERMINATION
A method of remote communications with an on-board diagnostics (OBD) system of a vehicle includes connecting a vehicle communications device to a connector of a vehicle's OBD system, connecting a remote communications device to a connector of a vehicle tool device, and establishing a network communications link between the vehicle-communications device and a remote communications device. The vehicle communications device receives communications at the vehicle-communications device from the vehicle's OBD system through the connector. A bit stream of the received communications is analyzed over an interval of time. The widths of one or more bit pulses are estimated based on the analyzing of the bit stream. A bit rate of the OBD system is determined based on the estimated widths of the one or more bit pulses. Based on the determined bit rate of the OBD system, bidirectional communications are established between the OBD system and the tool device using the established network communications link between the vehicle-communications device and the remote communications device.
INFORMATION CONTROL METHOD AND COMMUNICATIONS DEVICE
An information control method and a communications device are provided. The method includes: obtaining first information; and executing at least one of the following operations: determining a first delay according to the first information; determining a second delay according to the first information; determining delay requirement information according to the first information; sending the delay requirement information to a network element in a communications network; sending bridge delay information to a third-party network or a third-party application; executing a first operation when it is determined that a first condition is met; and executing a second operation when it is determined that a second condition is met, where the first information includes at least one of the following: first time information, second time information, clock information of a first clock, and clock information of a second clock.
Synchronous sounds for audio assistant on devices
The various implementations described herein include methods and systems for synchronous audio playback. In one aspect, a method is performed at each of a plurality of electronic devices, each having an audio system, an internal clock, processors and memory storing programs for execution by the processors. Each device is configured for two-way communications with a server and associated with a user account. The device receives an identification of a first device as a common clock device that has a first internal clock being designated as a master clock. The device receives a synchronized audio playback command that includes audio data to be output and a future playback time. In response to receiving the audio data, the device determines a synchronized audio playback time. If the determined synchronized audio playback time has not yet occurred, the electronic device outputs the audio data based on the determined synchronized audio playback time.
Hardware clock with built-in accuracy check
A network device includes one or more ports for connecting to a communication network, packet processing circuitry and clock circuitry. The packet processing circuitry is configured to communicate packets over the communication network via the ports. The clock circuitry includes a hardware clock configured to indicate a network time used for synchronizing network devices in the communication network, and a built-in accuracy test circuit configured to check an accuracy of the hardware clock.
Time synchronization in integrated 5G wireless and time-sensitive networking systems
In a hybrid network comprising both guided and wireless communications technologies, a grandmaster clock is designated in one portion of the network and can be propagated across to the other portion by means of a timing synchronization message. This message may include timestamping information and other information to enable recipient devices to correctly synchronize to the grandmaster clock.
METHOD AND APPARATUS FOR ACQUIRING TIMESTAMP OF DATA STREAM, STORAGE MEDIUM, AND ELECTRONIC APPARATUS
The present disclosure provides a method and apparatus for acquiring a timestamp of a data stream, a storage medium and an electronic apparatus. The method for acquiring the timestamp of the data stream includes: receiving a data stream to be transmitted, and acquiring a first frame header identifier of the data stream to be transmitted in a serializer-deserializer (SERDES) clock mode, the first frame header identifier being used for representing a position of a frame header of the data stream to be transmitted; determining, based on the first frame header identifier, a timestamp of the data stream to be transmitted under a system clock; encapsulating the timestamp to obtain a first target data frame; and outputting the first target data frame.