Patent classifications
H04L7/0066
TRANSMISSION APPARATUS, RECEPTION APPARATUS, AND TRANSMISSION SYSTEM
To provide a transmission apparatus, a reception apparatus, and a transmission system that operate at the same clock as the reception apparatus without mounting an oscillation circuit on the transmission apparatus and realize a low error rate.
A transmission apparatus includes a first reception circuit, and a first transmission circuit, in which the first reception circuit receives a clock from the reception apparatus, and the first transmission circuit synchronizes retention data retained by the first transmission circuit using the received clock, and transmits the retention data to the reception apparatus.
SYMBOL GENERATION AND FRAME SYNCHRONIZATION FOR MULTIPULSE-PULSE POSITION MODULATION
A method and system for multipulse-pulse position modulation optical transmission that includes selecting a multipulse-pulse position modulation having a symbol alphabet having an upper-bound symbol alphabet size, and determining, based on at least one transmission characteristic associated with a transmitter, a subset of symbols of the selected symbol alphabet capable of being transmitted by the transmitter, the subset of symbols having a set of binary codewords. The method and system may include identifying two-symbol concatenation of binary codewords in the set of binary codewords, calculating a cross correlation of binary codeword in the set of binary code words through every two-symbol concatenation, determining a set of one or more acceptable codeword combinations by eliminating a portion of two-symbol concatenation of codewords corresponding to overlapping peaks in the respective calculated cross correlations, and transmitting, by the transmitter via an optical communication channel, information encoded based on the determined acceptable codeword combinations.
Time code synchronization method
The embodiment of the present disclosure provides a time code synchronization method, which includes following steps of: determining a target master node and one or more target slave nodes of a network system among the plurality of nodes; periodically sending a data packet to the one or more target slave nodes by the target master node, wherein the data packet includes a first time code and serial number information of the target master node; compensating the first time code according to the serial number information to obtain a second time code, and synchronizing the second time code by the one or more target slave nodes.
COMMUNICATION DEVICE, COMMUNICATION METHOD, AND COMMUNICATION PROGRAM
A communication device includes an interleaving unit that determines an interleaving length of transmit data to be transmitted through free-space optical communication, and interleaves the transmit data based on the determined interleaving length, and a shaping unit that shapes the interleaved transmit data so as to make the interleaving length detectable on a receiving side of the free-space optical communication.
Clock data recovery convergence in modulated partial response systems
A clock data recovery circuit detects illegal decisions for received data, accumulates a phase gradient for the data, determines a number of the illegal decisions in a configured window for receiving the data, and if the number of the illegal decisions exceeds a pre-defend number in the window, applies a sum of the accumulated phase gradient and a phase increment having a sign of the accumulated phase gradient to a clock circuit for the data receiver.
FPGA based system for decoding PAM-3 signals
An FPGA based system for decoding PAM-3 signals is disclosed, wherein the system comprises a directional coupler for separating 100BASE-T1 and 1000BASE-T1 master and slave signals, DVGAs for amplifying the master and slave signals, ADCs for sampling the amplified signals, and a FPGA module, wherein the FPGA module is configured for decoding the PAM-3 symbols, in real-time, from oversampled ADCs data using fully pipelined Register Transfer Level (RTL) architecture.
FPGA BASED SYSTEM FOR DECODING PAM-3 SIGNALS
An FPGA based system for decoding PAM-3 signals is disclosed, wherein the system comprises a directional coupler for separating 100BASE-T1 and 1000BASE-T1 master and slave signals, DVGAs for amplifying the master and slave signals, ADCs for sampling the amplified signals, and a FPGA module, wherein the FPGA module is configured for decoding the PAM-3 symbols, in real-time, from oversampled ADCs data using fully pipelined Register Transfer Level (RTL) architecture.
Communication system, list distribution station, communication method, and computer readable medium
A list distribution station of a communication station includes processing circuitry to record, in a memory, a grand master list containing a station code of a grand master and a station code of a communication station synchronized with the grand master, and receive a priority notification frame which contains, as a sender station code, a station code of a present grand master in the communication system. The processing circuitry is further included to decide, when notified of the station code of the present grand master, whether or not to update the grand master list based on the notified station code of the present grand master and the grand master list, and upon having decided to update the grand master list, to update the station code of the present grand master station on the grand master list with the notified station code of the present grand master station.
COMMUNICATION SYSTEM, LIST DISTRIBUTION STATION, COMMUNICATION METHOD, AND COMPUTER READABLE MEDIUM
A list distribution station of a communication station includes processing circuitry to record, in a memory, a grand master list containing a station code of a grand master and a station code of a communication station synchronized with the grand master, and receive a priority notification frame which contains, as a sender station code, a station code of a present grand master in the communication system. The processing circuitry is further included to decide, when notified of the station code of the present grand master, whether or not to update the grand master list based on the notified station code of the present grand master and the grand master list, and upon having decided to update the grand master list, to update the station code of the present grand master station on the grand master list with the notified station code of the present grand master station.
Wired communications device and method for operating a wired communications device
Embodiments of a method and a device are disclosed. In an embodiment, a method for operating a wired communications device involves including a frame boundary bit sequence and a random data sequence as a preamble of a bit stream, encoding the bit stream into an encoded bit stream, and transmitting the encoded bit stream using the wired communications device.