A multiple access scheme is provided. A first communications terminal encodes a first data stream using a forward error correction (FEC) code, and scrambles the encoded first data stream based on a first scrambling signature. A second communications terminal encodes a second data stream using the FEC code, and scrambles the encoded second data stream based on a second scrambling signature. The first scrambling signature and the second scrambling signature are used, respectively, by the first terminal and the second terminal to distinguish the first encoded data stream from the second encoded data stream as respectively originating from the first terminal and the second terminal in a multiple access scheme, whereby the first encoded data stream and the second encoded data stream simultaneously share a wireless communications channel. The FEC code is a low density parity check (LDPC) code configured with a data node degree of two or three.

A transmission circuit includes a current output circuit that outputs a current to a first node, a first switch element provided between the first node and a first signal line, and a second switch element provided between the first node and a second signal line. When a transmission signal is at a first logic level, the first switch element is ON and the second switch element is OFF. When the transmission signal is at a second logic level, the first switch element is OFF and the second switch element is ON. The current output circuit outputs a second current in an n-bit period after the logic level of the transmission signal is inverted, and outputs a first current after the n-bit period.

A User Equipment and method for transmitting a random-access radio frequency (RF) signal by applying Asynchronous Coded Multiple Access (ACMA) in a communication system employing Orthogonal Frequency Division Multiplexing (OFDM) is described. The method including: encoding an information stream as OFDM symbols using a low rate Forward Error Correction (FEC) coding suitable for Successive Interference Cancellation (SIC) to form a payload; generating a burst, including symbols, by performing an inverse fast Fourier transform on a unique word (UW) multiplexed with the payload; and synchronizing a transmission of each of the symbols of the burst with consecutive symbol-start instants. The UW includes a plurality of Zadoff-Chu (ZC) like sequences disposed in a subset of consecutive symbol-start instants of the burst. A receiver detects burst arrival by searching for consecutive ZC-like sequences. Channel state estimation can be performed by using the UW with additional ZC-like sequences in the burst.

A communication device includes a sampler configured to sample an input signal, wherein the sampler is configured to generate a sampled value for each sampling time of a sequence of sampling times, a sequence value generator configured to generate an output value for each sampling time of the sequence of sampling times based on the sampled values, wherein the sequence value generator is configured to set the output value for a sampling time based on the sampled value for the sampling time and based on a limitation of the difference between the output value for the sampling time and the output value for the preceding sampling time in the sequence of sampling times, and an edge detector configured to detect an edge in the input signal based on the output values.

Advanced detectors for vector signaling codes are disclosed which utilize multi-input comparators, generalized on-level slicing, reference generation based on maximum swing, and reference generation based on recent values. Vector signaling codes communicate information as groups of symbols which, when transmitted over multiple communications channels, may be received as mixed sets of symbols from different transmission groups due to propagation time variations between channels. Systems and methods are disclosed which compensate receivers and transmitters for these effects and/or utilize codes having increased immunity to such variations, and circuits are described that efficiently implement their component functions.

A primary device implementing the subject system of link establishment for single pair Ethernet may include at least one processor. The at least one processor may be configured to transmit a first synchronization sequence to a secondary device, detect a second synchronization sequence transmitted by the secondary device, the second synchronization sequence differing from the first synchronization sequence, and after detection of the second synchronization sequence, initiate a training stage, the train stage comprising exchanging training frames with the secondary device. The at least one processor may be further configured to enter a data mode for data transmissions after completion of the training stage, the data transmissions being distinct from the training frames. In the data mode, data may be forward error correction encoded and then scrambled.

The present invention relates to a high data rate Ka-band modulator and transmitter for space applications that functions on the entire NASA Space Network Return Link band of 25.25-27.75 GHz. The modulator is capable of quadrature phase-shift keying (QPSK) modulation and 8-PSK modulation. The transmitter can be designed to provide an adjustable drive to a traveling-wave tube amplifier (TWTA) or transmit power.

Provided is a reception apparatus capable of shortening a time period until the original data and clock can be recovered from a digital signal after temporary superimposition of noise on the digital signal stops. A reception apparatus 20 includes a receiver unit 21, a voltage-controlled oscillator 22, a sampler unit 23, a control voltage generation unit 24, an error detection unit 25, a training control unit 26, and an equalizer control unit 27. The receiver unit 21 includes an equalizer unit 21A. When the error detection unit 25 detects an error of a digital signal, the reception apparatus 20 causes a phase/frequency comparison by the control voltage generation unit 24 to be stopped.

Methods, systems, and devices for wireless communication are described. A base station may identify a transport block for transmission that includes an information component and an error detection code. The base station may transmit a first encoded message during a first transmission time. The first encoded message may be obtained by encoding the transport block cyclically shifted a first bit length. The base station may transmit a second encoded message during a second transmission time. The second encoded message may be obtained by encoding the transport block cyclically shifted a second bit length. The relative time distance between the first and second transmission times may convey an indication of the difference between the first bit length and the second bit length.

Techniques and apparatus for detection of a signal at an I/O interface module are described. In one embodiment, for example, an apparatus to provide signal detection may include at least one receiver, at least one memory, and logic for a signal detection module, at least a portion of the logic comprised in hardware coupled to the at least one memory and the at least one receiver, the logic to access a plurality of pulse signals of a clock and data recovery (CDR) circuit, analyze at least one pulse characteristic of the plurality of pulse signals, and generate a signal determination to indicate a signal at the at least one receiver based on the at least one pulse characteristic. Other embodiments are described and claimed.