Disclosed are a method for acquiring synchronization in a cable network, and a physical (PHY) transmitter and PHY receiver. The method for acquiring synchronization in a cable network according to an embodiment includes receiving, by a PHY receiver, a signal from a PHY transmitter, and acquiring, by the PHY receiver, channel synchronization when a symbol in which a channel preamble exists is detected from the received signal and a position of a frequency in which a channel subcarrier exists is detected from the detected symbol by performing a cross correlation operation on the received signal and the channel preamble.

Disclosed are a method for acquiring synchronization in a cable network, and a physical (PHY) transmitter and PHY receiver. The method for acquiring synchronization in a cable network according to an embodiment includes receiving, by a PHY receiver, a signal from a PHY transmitter, and acquiring, by the PHY receiver, channel synchronization when a symbol in which a channel preamble exists is detected from the received signal and a position of a frequency in which a channel subcarrier exists is detected from the detected symbol by performing a cross correlation operation on the received signal and the channel preamble.

An electronic controller of a restraint control system for a vehicle comprises an electronic control unit including a first serial interface. The electronic controller also comprises a communications controller including a second serial interface and a plurality of PSI5 (Peripheral Sensor Interface 5) digital communications interfaces. Each of the first and second serial interfaces are Serial Peripheral Interfaces (SPI) in direct communications with one another, and the digital communications interfaces are each configured to communicate with a remote sensor. The communications controller is configured to transmit a voltage sync pulse to each of the remote sensors via the PSI5 digital communications interfaces in response to a synchronization command received from the electronic control unit via the serial interconnection. The voltage sync pulses on each of the PSI5 interfaces may be staggered and non-overlapping to reduce EMI production and to reduce the current load of the electronic controller.

A baud-rate phase detector uses two error samplers. One error sampler is used to determine whether the sampling time is too early error detection. The other is used to determine whether sampling time is too late. The early error sampler is configured to use a first threshold voltage. The late error sampler is configured to use a second threshold voltage. By adjusting the voltage difference between the first threshold voltage and the second threshold voltage, the phase difference between the local timing reference clock and the transitions of the data signal may be adjusted. The phase difference between the local timing reference clock and the transitions of the data signal may be adjusted to improve or optimize a desired receiver characteristic such as bit error rate or signal eye opening.

A baud-rate phase detector uses two error samplers. One error sampler is used to determine whether the sampling time is too early error detection. The other is used to determine whether sampling time is too late. The early error sampler is configured to use a first threshold voltage. The late error sampler is configured to use a second threshold voltage. By adjusting the voltage difference between the first threshold voltage and the second threshold voltage, the phase difference between the local timing reference clock and the transitions of the data signal may be adjusted. The phase difference between the local timing reference clock and the transitions of the data signal may be adjusted to improve or optimize a desired receiver characteristic such as bit error rate or signal eye opening.

A receiving apparatus is provided, including: a receiving unit to receive a plurality of pulses including a synchronization pulse and a data pulse having a data pulse width corresponding to a data value; a searching unit to search for pulse information indicating a pulse period or the like that falls within a synchronization pulse acceptable range from among pulse information indicating pulse periods or pulse widths of the respective pulses; a detecting unit to detect whether pulse information of a second pulse at a predetermined location relative to a first pulse corresponding to the searched pulse information indicates a pulse period or the like that falls within a data pulse acceptable range; an identifying unit to identify the first pulse as the synchronization pulse on condition that the pulse information of the second pulse indicates a pulse period or the like that falls within the data pulse acceptable range.

Various aspects described herein relate to techniques for synchronization channel design and signaling in wireless communications systems (e.g., a 5th Generation (5G) New Radio (NR) system). In an aspect, a method includes identifying a frequency band supported by a user equipment (UE), identifying one or more frequency locations based on the identified frequency band, and the one or more frequency locations are a subset of synchronization raster points used for synchronization signal transmission. The method further includes searching for at least one synchronization signal based on the one or more identified frequency locations.

Various aspects described herein relate to techniques for synchronization channel design and signaling in wireless communications systems (e.g., a 5th Generation (5G) New Radio (NR) system). In an aspect, a method includes identifying a frequency band supported by a user equipment (UE), identifying one or more frequency locations based on the identified frequency band, and the one or more frequency locations are a subset of synchronization raster points used for synchronization signal transmission. The method further includes searching for at least one synchronization signal based on the one or more identified frequency locations.

A system includes a first controller configured to transmit a synchronization signal to a second controller. The second controller is configured to produce a PWM signal. The system also includes a counter configured to provide a count for the second controller, where the second controller is configured to initiate rising edges and falling edges of the PWM signal based on the count from the counter. The second controller is also configured to measure an error between a time when the synchronization signal is received at the second controller and an expected time of receipt for the synchronization signal. The second controller is also configured to adjust a period of the counter based at least in part on the error.

A system includes a first controller configured to transmit a synchronization signal to a second controller. The second controller is configured to produce a PWM signal. The system also includes a counter configured to provide a count for the second controller, where the second controller is configured to initiate rising edges and falling edges of the PWM signal based on the count from the counter. The second controller is also configured to measure an error between a time when the synchronization signal is received at the second controller and an expected time of receipt for the synchronization signal. The second controller is also configured to adjust a period of the counter based at least in part on the error.