Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing.

In one embodiment, an apparatus comprises: a receiver to receive training data from a transmitter; a clock and data recovery (CDR) circuit coupled to the receiver, the CDR circuit to recover a recovered clock signal from the training data; and a media access control (MAC) circuit coupled to the CDR circuit, wherein the MAC circuit is to send a clock switch indicator to the CDR circuit to cause the CDR circuit to halt tracking operation of the CDR circuit. Other embodiments are described and claimed.

A data transmitter for transmitting data to a data receiver is provided, wherein individual communication information is known to the data transmitter and the data receiver, the data transmitter being configured to generate an individual synchronization sequence while using the individual communication information.

A data transmitter for transmitting data to a data receiver is provided, wherein individual communication information is known to the data transmitter and the data receiver, the data transmitter being configured to generate an individual synchronization sequence while using the individual communication information.

A memory controller having a data receiver to sample data at a sample timing using a strobe signal, wherein the data and the strobe signal are sent by a memory device in connection with a read operation initiated by the memory controller, and a strobe receiver to receive the strobe signal, wherein a phase of the strobe signal has a drift relative to a reference by an amount. The memory controller further having a monitoring circuit to monitor the strobe signal and determine the amount of the drift, and an adjustment circuit to update the sample timing of the data receiver based on the amount of drift determined by the monitoring signal.

A memory controller having a data receiver to sample data at a sample timing using a strobe signal, wherein the data and the strobe signal are sent by a memory device in connection with a read operation initiated by the memory controller, and a strobe receiver to receive the strobe signal, wherein a phase of the strobe signal has a drift relative to a reference by an amount. The memory controller further having a monitoring circuit to monitor the strobe signal and determine the amount of the drift, and an adjustment circuit to update the sample timing of the data receiver based on the amount of drift determined by the monitoring signal.

In a case where signals branched from a single reference signal source are transmitted via a plurality of cables, a phase synchronization circuit can be used to stabilize a phase of a signal to be outputted from each cable. However, the phases of signal to be outputted from each cable is affected by combination of a length of each cable and an amount of delay caused by feedback control, so that phases of synchronization signals to be outputted from a plurality of transmission paths are not always the same as each other. In the present invention, since a frequency multiplier that multiplies a frequency of a signal outputted from each transmission path by an even number is provided for a phase synchronization circuit, the phases of the synchronization signals to be outputted from the transmission paths are aligned even when signals are branched from one reference signal.

In a case where signals branched from a single reference signal source are transmitted via a plurality of cables, a phase synchronization circuit can be used to stabilize a phase of a signal to be outputted from each cable. However, the phases of signal to be outputted from each cable is affected by combination of a length of each cable and an amount of delay caused by feedback control, so that phases of synchronization signals to be outputted from a plurality of transmission paths are not always the same as each other. In the present invention, since a frequency multiplier that multiplies a frequency of a signal outputted from each transmission path by an even number is provided for a phase synchronization circuit, the phases of the synchronization signals to be outputted from the transmission paths are aligned even when signals are branched from one reference signal.

A power supply system that includes a pluggable and replaceable modular power interface card and a separate main chassis component that can include AC to DC power conversion and regulation circuitry, a digital voltage display, and one or more card slots for receiving the power supply card. The modular power interface card can provide power to a network device that is connected thereto. The modular power interface card can include an isolation and protection unit that includes a voltage suppression subunit and a high voltage protection subunit, fusing, and a path to earth ground. The modular power interface card plugs into the main chassis and can be quickly replaced in the event of damage or failure, and can include light emitting diodes (LEDs) to indicate whether the remote device being powered is consuming current, which is useful during troubleshooting.

A power supply system that includes a pluggable and replaceable modular power interface card and a separate main chassis component that can include AC to DC power conversion and regulation circuitry, a digital voltage display, and one or more card slots for receiving the power supply card. The modular power interface card can provide power to a network device that is connected thereto. The modular power interface card can include an isolation and protection unit that includes a voltage suppression subunit and a high voltage protection subunit, fusing, and a path to earth ground. The modular power interface card plugs into the main chassis and can be quickly replaced in the event of damage or failure, and can include light emitting diodes (LEDs) to indicate whether the remote device being powered is consuming current, which is useful during troubleshooting.