Patent classifications
H04L12/42
Co-packaged multiplane networks
A co-packaged, multiplane network includes: an enclosure; a portion of a first network plane disposed within the enclosure and comprising a first plurality of interconnected switches; a portion of a second network plane disposed within the enclosure and comprising a second plurality of interconnected switches, the second network plane being independent of the first network plane and having the same topology as the first network plane; and a plurality of connectors, each connector being communicatively coupled to a respective port of each of the first plurality of interconnected switches and the second plurality of interconnected switches.
Blockchain based vehicle control
A vehicle control method of starting and shutting down an engine, in which a processor receives a blockchain update comprising a first transaction with instructions to perform an engine startup or shutdown; the blockchain update is validated; an engine startup or shutdown is performed based on the validated blockchain update; where the engine startup or shutdown is delayed based on validating a predetermined number of subsequent blockchain updates, including a second transaction with instructions to perform the engine startup or shutdown.
Daisy-chained power-over-ethernet (PoE) network
A system that maintains power consumption of a network to a predefined limit. A plurality of elements such as components, nodes and modules may be connected in a daisy chain configuration. Power may be inserted to one or more of the elements which may proceed down the chain to be consumed by the one or more elements. However, there a limit as to the total amount of energy that may be consumed at the same time. Thus, power to the elements may be scheduled so that the limit is not exceeded by at any one time. At the same time, communications may proceed through that chain from element to element. An example of the present system may be a power over a network (PoE).
Redundant communication channels and processing of imaging feeds
A computing system may use redundant communication pathways for communicating surgical imaging feed(s). The computing system may obtain multiple surgical video streams via multiple pathways. The multiple surgical video streams may include copies of the same video. The surgical video streams may be obtained, for example, from the same intra-body imaging feed, such as intra-body visual light feed. For example, a first video stream may be obtained via a communication pathway, and a second video stream may be obtained via another communication pathway. The computing system may display or send a surgical video stream for display. The computing system may whether the video stream being displayed has encountered any issues. Upon detecting an issue with the video stream being displayed, the computing system may display or send another obtained surgical video stream for display.
RESERVATION MECHANIC FOR NODES WITH PHASE CONSTRAINTS
A computer chip, a method, and computer program product for providing phase reservations between processing nodes. A computer chip includes a plurality of processing nodes interconnected in an on-chip data transfer network configured in a circular topology. The processing nodes include reservation mechanisms managing reservations made by processing nodes with phase constraints. The reservation policy allows the processing nodes to make a reservation, for a given phase, in any phase window, only once per reservation window. A reservation window can be a bounded amount of time for when a node is guaranteed an opportunity to transmit at least one message. The reservation policy also prevents the processing nodes from making more than one reservation in a phase window. Once a reservation is granted, the corresponding message may progress on the bus unimpeded. Requestors attempting to transmit messages are blocked until the message is transmitted.
POWER-OVER-ETHERNET (POE) DEVICE AND POE SYSTEM USING THE SAME
A PoE system includes a plurality of PoE devices and a hub that are coupled in a ring configuration through a plurality of network cables. The hub is coupled to two of the network cables, and provides electric power to at least one of the network cables that is coupled to the hub. Each of the PoE devices is coupled to two of the network cables, receives electric power from one of the two network cables, and supplies electric power to the other one of the two network cables. As a consequence, each of the PoE devices can be directly or indirectly powered by the hub.
POWER-OVER-ETHERNET (POE) DEVICE AND POE SYSTEM USING THE SAME
A PoE system includes a plurality of PoE devices and a hub that are coupled in a ring configuration through a plurality of network cables. The hub is coupled to two of the network cables, and provides electric power to at least one of the network cables that is coupled to the hub. Each of the PoE devices is coupled to two of the network cables, receives electric power from one of the two network cables, and supplies electric power to the other one of the two network cables. As a consequence, each of the PoE devices can be directly or indirectly powered by the hub.
Entry Information Processing Method and Apparatus
A system and method for processing dynamic host configuration protocol (DHCP) snooping entry information in a ring network An entry information processing apparatus includes a processor and a non-transitory memory connected to the processor and storing program code for execution by the processor. The program code includes instructions to generate a first packet, where the first packet includes DHCP snooping entry information, the DHCP snooping entry information includes a first internet protocol (IP) address of first user equipment and a first media access control (MAC) address of the first user equipment, and the first user equipment accesses a ring network via a first communication apparatus in which the entry information processing apparatus is used, and send the first packet.
System-on-chip including network for debugging
Provided is a system-on-chip. A central controller is configured to, in response to a request from a host, generate a first signal for requesting error information related to an error from a design of an IP. A local controller is configured to generate a second signal including the error information of the target IP if the request from the host is determined to be for the target IP based on the first signal.
System-on-chip including network for debugging
Provided is a system-on-chip. A central controller is configured to, in response to a request from a host, generate a first signal for requesting error information related to an error from a design of an IP. A local controller is configured to generate a second signal including the error information of the target IP if the request from the host is determined to be for the target IP based on the first signal.