Patent classifications
H04L25/026
SYSTEMS AND METHODS FOR VARYING AN IMPEDANCE OF A CABLE
A system may include a transmitter, a receiver, a cable coupled between the transmitter and the receiver and having two wires for communicating a differential signal from the transmitter to the receiver, and a direct-current (DC) voltage source coupled to a first wire of the two wires of the cable and configured to apply a variable DC offset voltage to the first wire in order to vary an impedance of the cable as a function of the variable DC offset voltage.
Extendable wire-based data communication cable assembly
Various implementations of a data communication cable assembly are disclosed that improve the transmission of data signals that traverse long distances. Some cable assembly implementations are configured to transmit data signals via one or more electrical wire mediums and one or more signal extenders that modify the data signals for improved transmission between devices over one or more electrical wire mediums. Other cable assembly implementations are configured to transmit data signals via one or more optical transmission mediums and optical-to-electrical and electrical-to-optical converters for improved transmission of the data signals between devices. Other cable assembly implementations are configured for cascading or daisy-chaining together for transmitting data signals between devices in the optical and/or electrical domain.
MULTI-MODE LINE DRIVER CIRCUIT FOR THE PHYSICAL LAYER OF A NETWORK CONNECTION, PARTICULARLY OF AN ETHERNET COMMUNICATION, SUPPORTING DIFFERENT SIGNAL LEVELS FOR DIFFERENT COMMUNICATION STANDARDS
A multi-mode line driver circuit supporting different communication standards includes an output for the network connection, and driver elements connected in parallel to the output. Each driver element is connected to a positive and negative supply voltage, and includes a resistor, a first switch and a second switch. The resistor is connected to the output and via the first switch to the positive supply voltage and via the second switch to the negative supply voltage. The driver circuit also includes at least one coding block with an input for a digital signal to be transmitted over the network connection. The coding block provides control signals for the first switch and the second switch for connecting the resistor of each driver element to the positive supply voltage or the negative supply voltage. The digital signal of the multi-mode line driver circuit is coded according to a communication standard.
Systems and methods for varying an impedance of a cable
A system may include a transmitter, a receiver, a cable coupled between the transmitter and the receiver and having two wires for communicating a differential signal from the transmitter to the receiver, and a direct-current (DC) voltage source coupled to a first wire of the two wires of the cable and configured to apply a variable DC offset voltage to the first wire in order to vary an impedance of the cable as a function of the variable DC offset voltage.
Parallel channel skew for enhanced error correction
Digital communication transmitters, systems, and methods can introduce skew into parallel transmission channels to enhance the performance of forward error correction (FEC) decoders. One illustrative serializer-deserializer (SerDes) transmitter embodiment includes: a block code encoder configured to convert a sequence of input data blocks into a sequence of encoded data blocks; a demultiplexer configured to distribute code symbols from the sequence of encoded data blocks to multiple lanes in a cyclical fashion, the multiple lanes corresponding to parallel transmission channels; a skewer configured to buffer the multiple lanes to provide respective lane delays, the lane delays differing from each other by no less than half an encoded data block period; and multiple drivers, each driver configured to transmit code symbols from one of said multiple lanes on a respective one of said parallel transmission channels.
SIGNAL TRANSMISSION DEVICE AND CABLE CONNECTING CIRCUIT
A signal transmission device, including a RF processing circuit and a cable connecting circuit including a first choke inductor, a first and second bypass capacitors, and a first coupling capacitor, is provided. One end of the first choke inductor is coupled to a transceiver end of a RF transceiver and the other end is coupled to a first control end of a RF antenna controller.
The transceiver end is coupled to a first conductor. The first bypass capacitor is coupled between the other end and a digital ground terminal. The first coupling capacitor is coupled between the digital ground terminal and a RF ground terminal. The second conductor is coupled to the RF ground terminal and a second control terminal of the RF antenna controller at a second connecting end of a RF cable. The second bypass capacitor is coupled between the second control terminal and the digital ground terminal.
EXTENDABLE WIRE-BASED DATA COMMUNICATION CABLE ASSEMBLY
Various implementations of a data communication cable assembly are disclosed that improve the transmission of data signals that traverse long distances. Some cable assembly implementations are configured to transmit data signals via one or more electrical wire mediums and one or more signal extenders that modify the data signals for improved transmission between devices over one or more electrical wire mediums. Other cable assembly implementations are configured to transmit data signals via one or more optical transmission mediums and optical-to-electrical and electrical-to-optical converters for improved transmission of the data signals between devices. Other cable assembly implementations are configured for cascading or daisy-chaining together for transmitting data signals between devices in the optical and/or electrical domain.
Communication apparatus and communication system
To obtain a communication apparatus capable of reducing the consumption of electric power. A communication system according to the present disclosure includes a transmitter that generates a first signal including communication data and sends the first signal through a communication terminal in a first operation mode, and that generates a second signal including a predetermined first signal pattern and having a transition rate lower than the first signal and sends the second signal through the communication terminal in a second operation mode, and a controller that sets an operation mode for the transmitter to either of a plurality of operation modes including the first operation mode and the second operation mode.
CROSSTALK REDUCTION IN RECEIVER INDUCTIVE LOOP USING CAPTURING LOOP IN TRANSMITTING INDUCTIVE LOOP
An inductively coupled multi-channel digital isolator where the transmitter and receiver inductive loops of a given channel are coplanar. In the case where two adjacent channels flow data in opposite directions, the receiver inductive loops of a given channel include a large, generally conventional loop portion and a small loop portion that is located inside the transmitter inductive loops of the adjacent channels. The sizes of the small loop portion and the conventional loop portion are generally in the ratio of the magnetic flux in the conventional loop portion to the magnetic flux in the transmitter inductive loop. This size relationship results in the voltage of the small loop portion being very close but opposite in sign to the voltage in the conventional loop portion. As a result, there is minimal crosstalk from the transmitter inductive loop of one channel to the receiver inductive loop of the adjacent channel.
PARALLEL CHANNEL SKEW FOR ENHANCED ERROR CORRECTION
Digital communication transmitters, systems, and methods can introduce skew into parallel transmission channels to enhance the performance of forward error correction (FEC) decoders. One illustrative serializer-deserializer (SerDes) transmitter embodiment includes: a block code encoder configured to convert a sequence of input data blocks into a sequence of encoded data blocks; a demultiplexer configured to distribute code symbols from the sequence of encoded data blocks to multiple lanes in a cyclical fashion, the multiple lanes corresponding to parallel transmission channels; a skewer configured to buffer the multiple lanes to provide respective lane delays, the lane delays differing from each other by no less than half an encoded data block period; and multiple drivers, each driver configured to transmit code symbols from one of said multiple lanes on a respective one of said parallel transmission channels.