H04L25/0264

Transmission circuit for ethernet
09722417 · 2017-08-01 · ·

A transmission circuit including four transmission component sets for Ethernet is provided. For each of the transmission component sets, a first capacitor and a first inductor are cascaded, the first inductor is coupled to the Ethernet connector via the first transmission line (TL), the first capacitor is coupled to the Ethernet chip via the second TL; a second capacitor and a second inductor are cascaded, the second inductor is coupled to the Ethernet connector via the third TL, the second capacitor is coupled to the Ethernet chip via the fourth TL; a first component set is coupled between a first contact and a second contact, the first contact is located between the first capacitor and the first inductor, and the second contact is located between the second capacitor and the second inductor; and a second component set is coupled between the second TL and the fourth TL.

Isolated system data communication
09768945 · 2017-09-19 · ·

Embodiments of the present invention may provide a system with a first and second circuit system separated by an electrical isolation barrier but provided in communication by at least one isolator device that bridges the isolation barrier. The first circuit system may include a communication system to transmit data across a common isolator device as a series of pulses, and the second circuit system may receive the series of pulses corresponding to the data. The second circuit system may include a detector coupled to the common isolator device to detect the received pulses, a oneshot to frame the received pulse(s), and a controller to reconstruct the data based on accumulated framed pulse(s). Therefore, noise induced spurious pulses outside the oneshot intervals may be ignored by the second circuit system providing improved noise immunity.

APPARATUS AND METHODS FOR GENERATING NON-INTERFERING ELECTROMAGNETIC WAVES ON AN UNINSULATED CONDUCTOR

Aspects of the subject disclosure may include, receiving a plurality of communication signals, and generating, according to the plurality of communication signals, a plurality of electromagnetic waves bound at least in part to a dielectric layer of a conductor. The plurality of electromagnetic waves propagates along the dielectric layer of the conductor without an electrical return path, where each electromagnetic wave of the plurality of electromagnetic waves includes a different portions of the plurality of communication signals, and where the plurality of electromagnetic waves utilizes a signal multiplexing configuration that at least reduces an interference between the plurality of electromagnetic waves. Other embodiments are disclosed.

Signal transmission device and cable connecting circuit

A signal transmission device, including a RF processing circuit and a cable connecting circuit including a first choke inductor, a first and second bypass capacitors, and a first coupling capacitor, is provided. One end of the first choke inductor is coupled to a transceiver end of a RF transceiver and the other end is coupled to a first control end of a RF antenna controller. The transceiver end is coupled to a first conductor. The first bypass capacitor is coupled between the other end and a digital ground terminal. The first coupling capacitor is coupled between the digital ground terminal and a RF ground terminal. The second conductor is coupled to the RF ground terminal and a second control terminal of the RF antenna controller at a second connecting end of a RF cable. The second bypass capacitor is coupled between the second control terminal and the digital ground terminal.

PAM-4 DFE architectures with symbol-transition dependent DFE tap values

Decision feedback equalization (DFE) is used to help reduce inter-symbol interference (ISI) from a data signal received via a band-limited (or otherwise non-ideal) channel. A first PAM-4 DFE architecture has low latency from the output of the samplers to the application of the first DFE tap feedback to the input signal. This is accomplished by not decoding the sampler outputs in order to generate the feedback signal for the first DFE tap. Rather, weighted versions of the raw sampler outputs are applied directly to the input signal without further analog or digital processing. Additional PAM-4 DFE architectures use the current symbol in addition to previous symbol(s) to determine the DFE feedback signal. Another architecture transmits PAM-4 signaling using non-uniform pre-emphasis. The non-uniform pre-emphasis allows a speculative DFE receiver to resolve the transmitted PAM-4 signals with fewer comparators/samplers.

SIGNAL PROCESSING DEVICE, SIGNAL PROCESSING METHOD, AND PROGRAM
20220190640 · 2022-06-16 ·

The present technology relates to a signal processing device, a signal processing method, and a program capable of reducing influence of crosstalk.

Provided are: a plurality of comparators; a delay unit adapted to delay output of each of the plurality of comparators; and a subtractor adapted to subtract, from a supplied signal, a signal from the delay unit. The signal processing device processes signals transmitted in N phases and includes (N−1) or more comparators. Each of the plurality of comparators has a different threshold value set and compares a received signal with the threshold value, and in a case where the signal transitions between a plurality of voltage levels, the threshold value is set to a value within adjacent voltage levels. The present technology can be applied to a reception device that receives a signal transmitted in multiple phases and via multiple lines.

Circuit for a bus system and method for operating a circuit
11334514 · 2022-05-17 · ·

A circuit for a bus system is provided. The circuit includes: an ascertainment circuit, which is configured to ascertain a first state in which an absolute difference of a voltage between two bus-side terminals is above a threshold value, to ascertain a second state in which the absolute value of the voltage between the two bus-side terminals is below the threshold value, to ascertain a bit boundary as a function of a number of state transitions between the first and second state, and to ascertain at least one time window, the start of which is situated before the bit boundary and the end of which is situated after the bit boundary; and a suppression circuit, which is configured to be activated when a state transition from the first state into the second state occurs within the ascertained time window.

PAM-4 DFE ARCHITECTURES WITH SYMBOL-TRANSITION DEPENDENT DFE TAP VALUES

Decision feedback equalization (DFE) is used to help reduce inter-symbol interference (ISI) from a data signal received via a band-limited (or otherwise non-ideal) channel. A first PAM-4 DFE architecture has low latency from the output of the samplers to the application of the first DFE tap feedback to the input signal. This is accomplished by not decoding the sampler outputs in order to generate the feedback signal for the first DFE tap. Rather, weighted versions of the raw sampler outputs are applied directly to the input signal without further analog or digital processing. Additional PAM-4 DFE architectures use the current symbol in addition to previous symbol(s) to determine the DFE feedback signal. Another architecture transmits PAM-4 signaling using non-uniform pre-emphasis. The non-uniform pre-emphasis allows a speculative DFE receiver to resolve the transmitted PAM-4 signals with fewer comparators/samplers.

Variable impedance circuit
11728845 · 2023-08-15 · ·

A power line communication device including a current path provided between a first terminal and a second terminal. A coupling circuit includes a first circuit of a first inductor connected in parallel with a first capacitor and a first resistor, wherein the coupling circuit is connected between the first and second terminals. A sensor is configured to sense a communication parameter of the coupling circuit. The communication parameter may be a resonance of the first circuit, the quality (Q) factor of the resonance, the bandwidth (BW) of the coupling circuit, the resistance of the first resistor, or the impedance of the first circuit. A transceiver is adapted to couple to the first and second terminal to transmit a signal onto the current path or receive a signal from the current path responsive to the parameter of the coupling circuit and a level of current in the current path sensed by the sensor.

Hart-enabled device with reduced communication lines and break extension protocol

A current loop includes a receiver assembly and a transmitter assembly. The current loop also includes: a first conductor between the receiver assembly and the transmitter assembly; and a second conductor between the receiver assembly and the transmitter assembly to complete the current loop. The transmitter assembly includes: a Highway Addressable Remote Transducer (HART) modem; a component in communication with the HART modem via a partial set of Universal Asynchronous Receiver-Transmitter (UART) communication lines; and a break extension protocol controller coupled to or included with the HART modem and configured to support UART and non-UART communications between the HART modem and the component using the partial set of UART communication lines.