A telecommunications system is provided that can re-sample a digitized signal at a resample rate that is based on one or more factors to better utilize bandwidth. The factors can include the bandwidth of the signal that the digitized signal represents, the amount of bandwidth owned or used by the carrier, the full bandwidth of the designated RF band, the bandwidth of the serial link, the frame length of the serial link, the segmentation of the frames on the serial link, and the capability of the equipment at the receiving end of a serial link. The re-sampled signal can be transmitted to another unit that is remote to the unit transmitting the signal. The other unit can include a re-sampling device that restores the re-sampled signal to a digital signal that can be converted to an analog signal for wireless transmission.

A sample rate converter for an oversampled data stream develops interpolated samples at a first oversample rate, from samples at a second oversample rate; wherein the first oversample rate is a non-integer multiple of the second oversample rate. When the samples at the second oversample rate are changing state, at least two interpolated samples are generated or the interpolation is at least second order. When the sample at the second oversample rate is not changing state, the sample at the second oversample rate is passed substantially unchanged. In one embodiment of the invention, asynchronous sample rate conversion is performed, and the first oversample rate is a varying non-integer multiple of the second oversample rate.

A receiving device includes a determination part that determines the necessity of suppressing data transmission from a transmitting device via a unidirectional communication part, and a transmission suppression part that outputs a transmission suppression signal to the unidirectional communication part when the determination part determines that suppression of data transmission is necessary. The unidirectional communication part, when receiving the transmission suppression signal from the transmission suppression part, stops transmitting data transmitted by the transmitting device to the receiving device and the transmitting device. The transmitting device includes a comparison part that compares transmitted data with data from the unidirectional communication part, and stops data transmission when the comparison part determines that data do not match.

A receiving device includes a determination part that determines the necessity of suppressing data transmission from a transmitting device via a unidirectional communication part, and a transmission suppression part that outputs a transmission suppression signal to the unidirectional communication part when the determination part determines that suppression of data transmission is necessary. The unidirectional communication part, when receiving the transmission suppression signal from the transmission suppression part, stops transmitting data transmitted by the transmitting device to the receiving device and the transmitting device. The transmitting device includes a comparison part that compares transmitted data with data from the unidirectional communication part, and stops data transmission when the comparison part determines that data do not match.

Control unit for a transmission system, including: a sample rate converter, which is coupled to a digital-to-analog converting unit, wherein digital input data (data_in) are feedable to the sample rate converter; a PRBS generator, wherein an output signal (ss_div) of the PRBS generator is feedable to the sample rate converter and to a delay element, wherein an output signal (ss_div_del) of the delay element is feedable to a frequency synthesizer, wherein the frequency synthesizer is clockable by a reference clock (clk_ref) and wherein an output signal (clk_ss) of the frequency synthesizer is feedable to a clock input of the sample rate converter and to a clock input of the digital-to-analog converting unit.

Control unit for a transmission system, including: a sample rate converter, which is coupled to a digital-to-analog converting unit, wherein digital input data (data_in) are feedable to the sample rate converter; a PRBS generator, wherein an output signal (ss_div) of the PRBS generator is feedable to the sample rate converter and to a delay element, wherein an output signal (ss_div_del) of the delay element is feedable to a frequency synthesizer, wherein the frequency synthesizer is clockable by a reference clock (clk_ref) and wherein an output signal (clk_ss) of the frequency synthesizer is feedable to a clock input of the sample rate converter and to a clock input of the digital-to-analog converting unit.