In one example, receiver circuitry for a communication system comprises signal processing circuitry configured to receive a data signal and generate a processed data signal, and error slicer circuitry. The error slicer circuitry is coupled to the output of the signal processing circuitry, and configured to receive the processed data signal. The error slicer circuitry comprises a first error slicer configured to receive a clock signal, and output a first error signal based on a first state of the clock signal and processed data signal. The first error slicer is further configured to output a second error signal based on a second state of the clock signal and the processed data signal.

Systems and techniques are described that are directed to filter frequency response shift compensation, including compensating for shifting in the rejection band of the filter. Compensation for the shifting in the rejection band can include applying a pre-distortion to attenuate edge resource units (RUs), and applying PHY Protocol Data Unit (PPDU) scheduling schemes. For example, a PPDU scheduling scheme reduce bandwidth in the channel, thereby dropping the out of band RUs. Front ends provide feedback to a respective radio, which allows that radio to apply the appropriate pre-distortion. The front ends can include one or more filters enabling frequency domain coexistence between collocated radios operating in the differing Wi-Fi bands, and a coupler that provides the feedback indicating the frequency response shift to a radio. The radio can then apply a digital pre-distortion to compensate for the shifting in the rejection band.

Phase noise is a limiting factor in high-frequency 5G and 6G communications. Disclosed is a multiplexed amplitude-phase modulation scheme that can provide extremely wide phase noise margins at high frequencies. The transmitter can transmit a wave modulated in amplitude and phase, configured to provide a wide separation of phase states. The receiver, on the other hand, demodulates the message using quadrature amplitude modulation QAM, since that is generally more economical and technically preferred for signal processing. The demodulated message, however, still retains the large phase margins. As a further benefit, the examples illustrate non-square and asymmetric modulation schemes, which can extend the noise margins even further. By modulating with amplitude and phase, but demodulating with orthogonal branch signals, wireless networks can expand into high-frequency bandwidths while retaining high reliability and high throughput, as required for wireless applications of tomorrow.

Various embodiments relate to an end of packet (EOP) circuit, including: a reset pulse generator circuit configured to generate a reset pulse when a input signal transitions to a new value; an analog counter circuit configured to receive a squelch signal to start the counter and to receive the reset pulse to reset the counter; and an EOP detector circuit configured to produce a signal indicative that the input signal is an EOP signal based upon an output of the analog counter circuit.

A de-skew circuit, a de-skew method and a receiver are provided. The de-skew circuit includes N data synchronization circuits and a controller. An nth data synchronization circuit among the N data synchronization circuits includes an nth command detector and an nth buffer. The nth command detector changes an nth command detection signal when an nth input data stream satisfies a single channel condition. The nth buffer stores the nth input data stream in response to a voltage change of the nth command detection signal. The controller receives the nth command detection signal and changes a pop signal when a global channel condition is satisfied. The nth buffer outputs an nth timing-aligned data stream in response to a voltage change of the pop signal.

This application discloses example decoding methods, example decoder, and example decoding apparatuses. One example decodine method includes performing soft decision decoding on a first sub-codeword in a plurality of sub-codewords to obtain a hard decision result. It is determined whether to skip a decoding iteration. In response to determining not to skip the decoding iteration, a first turn-off identifier corresponding to the first sub-codeword is set to a first value based on the hard decision result. The first turn-off identifier indicates whether to perform soft decision decoding on the first sub-codeword in a next decoding iteration. The soft decision decoding is not performed on the first sub-codeword in the next decoding iteration when a value indicated by the first turn-off identifier is the first value. The hard decision result is stored.

A signal processing device includes: a memory; and a processor coupled to the memory and configured to: perform soft decision of a value of, among bit strings, a predetermined bit string encoded with a soft decision code from a symbol assigned to, according to each value of the bit strings, the bit strings having been subject to encoding of an outer code with a turbo product code and encoding of an inner code with the soft decision code; decode the predetermined bit string with the soft decision code on a basis of a result of the soft decision; individually perform, from the symbol, the soft decision of a value of each bit string other than the predetermined bit string among the bit strings; and decode the bit strings with the turbo product code on a basis of a result of the decoding and a result of the soft decision.

A feed forward equalizer including a first set of filter taps having a first set of filter tap coefficients to be adapted and a second set of one or more filter taps having one or more filter tap coefficients to be constrained. The feed forward equalizer includes an adaptation component to determine a set of adapted filter tap coefficient values corresponding to the first set of filter tap coefficients and a constraint function component to determine a constrained filter tap coefficient value for the second set of the one or more filter taps having the one or more filter tap coefficients to be constrained using a constraint function based on at least a portion of the set of adapted filter tap coefficient values. The feed forward equalizer generates, based at least in part on the constrained filter tap coefficient value, an equalized signal including a set of estimated symbol values.

Systems and techniques are described that are directed to filter frequency response shift compensation, including compensating for shifting in the rejection band of the filter. Compensation for the shifting in the rejection band can include applying a pre-distortion to attenuate edge resource units (RUs), and applying PHY Protocol Data Unit (PPDU) scheduling schemes. For example, a PPDU scheduling scheme reduce bandwidth in the channel, thereby dropping the out of band RUs. Front ends provide feedback to a respective radio, which allows that radio to apply the appropriate pre-distortion. The front ends can include one or more filters enabling frequency domain coexistence between collocated radios operating in the differing Wi-Fi bands, and a coupler that provides the feedback indicating the frequency response shift to a radio. The radio can then apply a digital pre-distortion to compensate for the shifting in the rejection band.

A signaling system is described. The signaling system comprises a transmit device, a receive device including a partial response receive circuit, and a signaling path coupling the transmit device and the receive device. The receive device observes an equalized signal from the signaling path, and includes circuitry to use feedback from the most recent previously resolved symbol to sample a currently incoming symbol. The transmit device equalizes transmit data to transmit the equalized signal, by applying weighting based on one or more data values not associated with the most recent previously resolved symbol value.