Systems and apparatuses for wireless power transfer system are described. A receiver may send an amplitude shift key (ASK) signal to a transmitter. The transmitter may receive the ASK signal from the receiver. The transmitter may perform a demodulation on the ASK signal. The transmitter may, in response to a failure to demodulate the ASK signal, encode a notification of failure in a frequency shift key (FSK) signal. The transmitter may transmit the FSK signal to the receiver. The receiver may receive the FSK signal. The receiver may perform a function to resolve the failure to demodulate the ASK signal.

Apparatus and methods are disclosed for transmitting and receiving data in a wireless communication network. Apparatus for transmitting data in a wireless communication network comprises a real modulation branch for modulating a first segment of a bit sequence to obtain a real modulated signal, a complex modulation branch for modulating a second segment of the bit sequence to obtain a complex modulated signal, a signal dividing unit configured to divide the bit sequence into a plurality of alternating first segments and second segments, and to send the first segments and the second segments to the real modulation branch and the complex modulation branch respectively, and a transmitter configured to transmit the real and complex modulated signals. Apparatus and methods are also disclosed for demultiplexing a plurality of data streams, using wide linear zero forcing with successive interference cancellation.

Apparatus and methods are disclosed for transmitting and receiving data in a wireless communication network. Apparatus for transmitting data in a wireless communication network comprises a real modulation branch for modulating a first segment of a bit sequence to obtain a real modulated signal, a complex modulation branch for modulating a second segment of the bit sequence to obtain a complex modulated signal, a signal dividing unit configured to divide the bit sequence into a plurality of alternating first segments and second segments, and to send the first segments and the second segments to the real modulation branch and the complex modulation branch respectively, and a transmitter configured to transmit the real and complex modulated signals. Apparatus and methods are also disclosed for demultiplexing a plurality of data streams, using wide linear zero forcing with successive interference cancellation.

Methods, systems, and devices for improving uniformity between levels of a multi-level signal are described. Techniques are provided herein to unify vertical alignment between data transmitted using multi-level signaling. Such multi-level signaling may be configured to capture transmitted data during a single clock cycle of a memory controller. An example of multi-level signaling scheme may be pulse amplitude modulation (PAM). Each unique symbol of the multi-level signal may be configured to represent a plurality of bits of data.

Methods, systems, and devices for improving uniformity between levels of a multi-level signal are described. Techniques are provided herein to unify vertical alignment between data transmitted using multi-level signaling. Such multi-level signaling may be configured to capture transmitted data during a single clock cycle of a memory controller. An example of multi-level signaling scheme may be pulse amplitude modulation (PAM). Each unique symbol of the multi-level signal may be configured to represent a plurality of bits of data.

One embodiment relates to a transmitting device, a receiving device, and the like for preventing increases in the number of communication links, power consumption, and circuit layout area. The transmitting device includes a high-speed signal generator, a low-speed signal generator, and a signal superimposing unit. The high-speed signal generator generates a high-speed signal having a limited frequency band. The low-speed signal generator generates a low-speed signal having a frequency lower than the frequency band of the high-speed signal. The signal superimposing unit outputs a superimposed signal of the high-speed signal and the low-speed signal. The receiving device includes a signal separator and a recovery unit. The signal separator separates the received signal into the high-speed signal and the low-speed signal. The recovery unit performs frequency tracking based on the separated low-speed signal and performs phase tracking based on the separated high-speed signal.

One embodiment relates to a transmitting device, a receiving device, and the like for preventing increases in the number of communication links, power consumption, and circuit layout area. The transmitting device includes a high-speed signal generator, a low-speed signal generator, and a signal superimposing unit. The high-speed signal generator generates a high-speed signal having a limited frequency band. The low-speed signal generator generates a low-speed signal having a frequency lower than the frequency band of the high-speed signal. The signal superimposing unit outputs a superimposed signal of the high-speed signal and the low-speed signal. The receiving device includes a signal separator and a recovery unit. The signal separator separates the received signal into the high-speed signal and the low-speed signal. The recovery unit performs frequency tracking based on the separated low-speed signal and performs phase tracking based on the separated high-speed signal.

Wireless digital communication method for the communication between two electronic devices (3, 16) of an industrial apparatus (1), including—encoding each bit of information by a respective sequence of a certain number (N) of pulses (25) that alternate with a corresponding number (N−1) of silence intervals (26), each pulse having a pulse duration (TI) shorter than or equal to ns and said silence intervals having respective silence durations (TSj) longer than or equal to 30 ns—transmitting, by a first electronic device, a radio signal (RS) comprising a plurality of radio pulses corresponding to the sequence of pulses without modulating any radio carrier, and—receiving and decoding, by the other electronic device, said radio signal to obtain said bit of information. The method may include additional steps for exchanging information between the electronic devices according to which one of the electronic devices, while in a stand-by state, transmits a request message, waits for a reply message from the other electronic device (if and when some conditions are complied with) and, upon receiving the reply message, switches to an operating state in which the two electronic devices are communicatively coupled to each other.

Wireless digital communication method for the communication between two electronic devices (3, 16) of an industrial apparatus (1), including—encoding each bit of information by a respective sequence of a certain number (N) of pulses (25) that alternate with a corresponding number (N−1) of silence intervals (26), each pulse having a pulse duration (TI) shorter than or equal to ns and said silence intervals having respective silence durations (TSj) longer than or equal to 30 ns—transmitting, by a first electronic device, a radio signal (RS) comprising a plurality of radio pulses corresponding to the sequence of pulses without modulating any radio carrier, and—receiving and decoding, by the other electronic device, said radio signal to obtain said bit of information. The method may include additional steps for exchanging information between the electronic devices according to which one of the electronic devices, while in a stand-by state, transmits a request message, waits for a reply message from the other electronic device (if and when some conditions are complied with) and, upon receiving the reply message, switches to an operating state in which the two electronic devices are communicatively coupled to each other.

The present disclosure relates to devices and methods for detecting and preventing occurrence of a saturation state in a power amplifier. A power amplifier module can include a power amplifier including a cascode transistor pair. The cascode transistor pair can include a first transistor and a second transistor. The power amplifier module can include a current comparator configured to compare a first base current of the first transistor and a second base current of the second transistor to obtain a comparison value. The power amplifier module can include a saturation controller configured to supply a reference signal to an impedance matching network based on the comparison value. The impedance matching network can be configured to modify a load impedance of a load line in electrical communication with the power amplifier based at least in part on the reference signal.