Methods and network interface modules for processing packet headers are provided. The method comprises: receiving a packet comprising a header and a payload; generating, using the header, an initial packet header vector (PHV); providing the initial PHV to a pipeline comprising a plurality of processing stages; and processing the initial PHV in the pipeline, wherein the processing comprises, for a current processing stage in the plurality of processing stages: receiving, by the current processing stage, an input PHV, wherein the input PHV (i) is the initial PHV or a modified version of the initial PHV and (ii) comprises one or more flits, and applying a feature to the input PHV to generate an output PHV, including increasing an initial length of the input PHV if the initial length is not sufficient to apply the feature.

Example implementations described herein are directed to a configurable Network on Chip (NoC) element that can be configured with a bypass that permits messages to pass through the NoC without entering the queue or arbitration. The configurable NoC element can also be configured to provide a protocol alongside the valid-ready protocol to facilitate valid-ready functionality across virtual channels.

In one embodiment, a method comprises identifying, by a path computation element, essential parent devices from a nonstoring destination oriented directed acyclic graph (DODAG) topology as dominating set members belonging to a dominating set; receiving, by the path computation element, an advertisement message specifying a first dominating set member having reachability to a second dominating set member, the reachability distinct from the nonstoring DODAG topology; and generating, by the path computation element based on the advertisement message, an optimized path for reaching a destination network device in the nonstoring DODAG topology via a selected sequence of dominating set members, the optimized path providing cut-through optimization across the nonstoring DODAG topology.

Example implementations described herein are directed to a configurable Network on Chip (NoC) element that can be configured with a bypass that permits messages to pass through the NoC without entering the queue or arbitration. The configurable NoC element can also be configured to provide a protocol alongside the valid-ready protocol to facilitate valid-ready functionality across virtual channels.

A network switch device includes an L1 switch having a first set of external ports and a first set of internal ports. The network switch device further includes an L2+L3 switch having a second set of internal ports, the L2+L3 switch operatively coupled to the L1 switch via the first set of internal ports and the second set of internal ports.

A broker system dynamically adjusts data processing techniques used by a network gateway for forwarding data over a network from a client system to an exchange system based on a switch mode parameter. The broker system dynamically adjusts the network gateway from using an error-propagating data processing technique (e.g. cut-through switching) to a non-error-propagating data processing technique (e.g. store and forward switching) based on the switch mode parameter. In particular, the broker system may adjust the network gateway when a count of unsuccessfully validated protocol data units meets a threshold specified by the switch mode parameter. While using the error-propagating technique, the broker system may modify a portion of the data protocol unit corresponding to a transport layer of a network protocol used by the network when a protocol data unit is unsuccessfully validated.

There is provided a method in a packet based network system for node-to-node transmission of data packets comprising timing packets and non-timing packets, which is directed to a mechanism for providing a delay variation compensation in a timing system or timing sensitive signal transport in a packet based network without participating in the timing signaling of the timing packets or timing sensitive packets themselves. The method comprises associating the data packets with different levels of transmission priority P.sub.r, P.sub.l, assigning highest (or highest available) transmission priority P.sub.r to the timing packets, separately queuing the timing packets in different buffers 401, 402, and providing first opportunity transmission of the timing packets regardless of transmission priority level of non-timing packets waiting to be transmitted. The advantage of the method is that timing-sensitive traffic thereby experiences reduced buffer delay variations.

Cut-through frame transfer or store-and-forward frame transfer of a frame in an network switch is disclosed. A frame is received from an input port of the switch. A time period in a cycle time when the frame is received and a stream identification of the frame is determined. One of the cut-through frame transfer and the store-and-forward frame transfer of the frame is performed based on the time period in the cycle time when the frame was received and the stream identification.

In one embodiment, an apparatus includes a switch core that has a multi-stage switch fabric. A first set of peripheral processing devices coupled to the multi-stage switch fabric by a set of connections that have a protocol. Each peripheral processing device from the first set of peripheral processing devices is a storage node that has virtualized resources. The virtualized resources of the first set of peripheral processing devices collectively define a virtual storage resource interconnected by the switch core. A second set of peripheral processing devices coupled to the multi-stage switch fabric by a set of connections that have the protocol. Each peripheral processing device from the first set of peripheral processing devices is a compute node that has virtualized resources. The virtualized resources of the second set of peripheral processing devices collectively define a virtual compute resource interconnected by the switch core.

A communication system in which a plurality of communication apparatuses in time synchronization with one another are connected over a network is provided. Each of the communication apparatuses includes management means for allowing transmission in accordance with a predetermined communication schedule, of cyclically transmitted first data to be used for control of a manufacturing apparatus or a production facility, second data which should be delivered to a destination within a designated time period, and third data different from the first and second data, selection means for selecting a data transfer scheme for each piece of data to be transmitted from among an on-the-fly scheme, a cut-through scheme, and a store-and-forward scheme based on the communication schedule, and a transmission and reception circuit which transfers each piece of data received from another communication apparatus to yet another communication apparatus in accordance with the data transfer scheme determined for that data.