H04L49/3018

Receive buffer management

Examples described herein can be used to allocate replacement receive buffers for use by a network interface, switch, or accelerator. Multiple refill queues can be used to receive identifications of available receive buffers. A refill processor can select one or more identifications from a refill queue and allocate the identifications to a buffer queue. None of the refill queues is locked from receiving identifications of available receive buffers but merely one of the refill buffers is accessed at a time to provide identifications of available receive buffers. Identifications of available receive buffers from the buffer queue are provide to the network interface, switch, or accelerator to store content of received packets.

POWER AWARE PACKET DISTRIBUTION
20170351311 · 2017-12-07 · ·

Disclosed herein is a computing device configured to implement power aware packet distribution. The computing device includes a central processing unit (CPU) comprising a plurality of cores and an interface controller communicatively coupled to the CPU. The interface controller is configured to receive a data packet to be sent to a targeted core of the plurality of cores and identify a power state of the targeted core. The interface controller is configured to redirect the data packet to an alternate core based on the power state of the targeted core.

METHOD FOR SENDING DATA PACKET AND NETWORK DEVICE

Embodiments of this application provide a method for sending a data packet. The method includes: A second network device may determine a remaining processing time of a data packet on a first network device based on a predefined first delay. When the remaining processing time is greater than 0, a moment at which the data packet enters a queue on the second network device serves as a start moment, and after a period of time, the remaining processing time ends at a second reference moment corresponding to the data packet. The remaining processing time is consumed on the second network device.

Framework for scheduling packets with multiple destinations in a virtual output queue network switch

A system for communicating a multi-destination packet through a network switch fabric is described. The system receives the multi-destination packet at an input port of the network switch fabric, wherein the multi-destination packet is directed to multiple output ports, and wherein the network switch fabric has a virtual output queue (VOQ) architecture, wherein each input port maintains a separate VOQ for each output port. The system sends the multi-destination packet by inserting the multi-destination packet into VOQs associated with the multiple output ports. While inserting the multi-destination packet in each VOQ, if the VOQ is empty, the system inserts the multi-destination packet at a head of the VOQ. Otherwise, if the VOQ is not empty and if the VOQ contains an end of a last complete packet received by the VOQ, the system inserts the multi-destination packet into the VOQ at the end of the last complete packet.

SYSTEM AND METHOD FOR FACILITATING DATA-DRIVEN INTELLIGENT NETWORK WITH INGRESS PORT INJECTION LIMITS

Data-driven intelligent networking systems and methods are provided. The system can accommodate dynamic traffic while applying injection limits to different traffic classes at an ingress edge port. The system can maintain state information of individual packet flows, which can be set up or released dynamically based on injected data. Each flow can be provided with a flow-specific input queue upon arriving at a switch. Packets of a respective flow can be acknowledged after reaching the egress point of the network, and the acknowledgement packets can be sent back to the ingress point of the flow along the same data path. Furthermore, an edge switch can dynamically allocate the ingress port bandwidth among the traffic classes that are active at a given moment.

Mapped FIFO buffering

A network interface device for connection between a network and a data processing system, the network interface device comprising: a plurality of ports for receiving data packets directed to the data processing system. An interface services the ports in a predetermined order and writes the data packets to buffers of a common memory. Each buffer is part of one of a set of linked logical sequence of buffers forming virtual queues in the common memory. Each virtual queue is associated with a port. A memory manager selects buffers of the common memory so as to cause the interface to populate the plurality of virtual queues with data packets.

Protocol independent programmable switch (PIPS) software defined data center networks

A software-defined network (SDN) system, device and method comprise one or more input ports, a programmable parser, a plurality of programmable lookup and decision engines (LDEs), programmable lookup memories, programmable counters, a programmable rewrite block and one or more output ports. The programmability of the parser, LDEs, lookup memories, counters and rewrite block enable a user to customize each microchip within the system to particular packet environments, data analysis needs, packet processing functions, and other functions as desired. Further, the same microchip is able to be reprogrammed for other purposes and/or optimizations dynamically.

SYSTEM AND METHOD FOR FACILITATING EFFICIENT PACKET FORWARDING IN A NETWORK INTERFACE CONTROLLER (NIC)

A network interface controller (NIC) capable of efficient packet forwarding is provided. The NIC can be equipped with a host interface, a packet generation logic block, and a forwarding logic block. During operation, the packet generation logic block can obtain, via the host interface, a message from the host device and for a remote device. The packet generation logic block may generate a plurality of packets for the remote device from the message. The forwarding logic block can then send a first subset of packets of the plurality of packets based on ordered delivery. If a first condition is met, the forwarding logic block can send a second subset of packets of the plurality of packets based on unordered delivery. Furthermore, if a second condition is met, the forwarding logic block can send a third subset of packets of the plurality of packets based on ordered delivery.

NETWORK TRAFFIC MANAGEMENT VIA NETWORK SWITCH QoS PARAMETERS ANALYSIS
20170230269 · 2017-08-10 ·

Some examples disclosed herein relate to traffic management via network switch QoS parameters analysis. In one example, a set of actual QoS parameters maybe analyzed using a set of configured QoS parameters of each network switch. A set of modified QoS parameters for each network switch maybe determined based on the analysis of the set of actual QoS parameters. The set of modified QoS parameters maybe recommended to configure each network switch for improved traffic management.

Method of data delivery across a network
09729450 · 2017-08-08 · ·

The present invention relates to a method of managing congestion in a multi-path network, the network having a plurality of network elements arranged in a plurality of switch stages and a plurality of network links interconnecting the network elements, the method comprising the steps of detecting congestion on a network link, the congested network link interconnecting the output port of a first network element with a first input port of a second network element in a subsequent switch stage; identifying an uncongested network link connected to a second input port of said second network element; and directing future data packets on a route across the multi-path network which includes the identified uncongested network link. Also provided is a multi-path network and an Ethernet bridge or router incorporating such a multi-path network.