H04L49/3036

Optical Switching
20170094379 · 2017-03-30 · ·

A network node comprises an optical input, an optical output, a random-access queue and processing system. It receives a data packet, at the optical input and determines whether to process it as a guaranteed-service packet or as a statistically-multiplexed packet. A guaranteed-service packet is output within a predetermined maximum time of receipt, optionally within a data container comprising container control information. A statistically-multiplexed packet is queued. The node determines a set of statistically-multiplexed packets that would fit a gap between two guaranteed-service packets; selects one of the packets; and outputs it between the two guaranteed-service packets.

Hierarchical Packet Buffer System

A switching device includes a primary memory and an traffic manager. The primary memory buffers packets for temporary storage. The traffic manager monitors consumed resources in the device related to the buffering of packets in the primary memory. The traffic manager migrates packets buffered in the primary memory to a secondary memory when the consumed resources exceed a certain threshold. The traffic manager also controls dequeuing of the packets from the primary memory and the secondary memory.

Message Queue Configuration to Separate Processing Paths for Control Messages and Data Messages
20250150412 · 2025-05-08 ·

A memory sub-system connectable to a microprocessor to provide network storage services. The memory sub-system has a random-access memory configured with: first queues for the microprocessor and a network interface; second queues for the microprocessor and a processing device; and third queues for the processing device and a storage device. The processing device is configured to: generate first control messages and first data messages from packets received by the network interface; place the first control messages into the first queues for the microprocessor; and place the first data messages into the third queues for the storage device. The microprocessor processes the first control messages to implement security and administrative functions and place second control messages in the second queues. The storage device is configured to retrieve the first data messages from the third queues and second control messages from the second queues for processing.

Queue protection using a shared global memory reserve

The subject technology relates to the management of a shared buffer memory in a network switch. Systems, methods, and machine readable media are provided for receiving a data packet at a first network queue from among a plurality of network queues, determining if a fill level of a queue in a shared buffer of the network switch exceeds a dynamic queue threshold, and in an event that the fill level of the shared buffer exceeds the dynamic queue threshold, determining if a fill level of the first network queue is less than a static queue minimum threshold.

COMBINING QUEUES IN A NETWORK DEVICE TO ENABLE HIGH THROUGHPUT

A network device includes network interfaces, and respective sets of queues. The sets of queues includes a first set corresponding to a first network interface and a second set corresponding to a second network interface. The network device receives packets via network interfaces, and processes packets to determine network interfaces via which the packets are to be transmitted. When the first network interface is not being used by the network device, the network device operates a composite queue to store packets corresponding to the second network interface. The composite queue includes a first queue from the first set and a second queue from the second set. The network device stores packet data to and reads packet data from the composite queue at a rate that is greater than a maximum rate at which the first queue and the second queue are capable of storing and reading packet data.