A partial packet context builder can determine a partial packet context associated with a data packet based upon packet context associated with the data packet, the partial packet context including a plurality of partial packet context fields, where a network packet processor including an action unit, the action unit including the partial packet context builder, a systolic array of arithmetic-logical units (ALUs), and a packet context builder, the packet context including a plurality of packet context fields. The systolic array of ALUs can process the partial packet context to provide a processed partial packet context, the processed partial packet context including a plurality of processed partial packet context fields. The packet context builder can merge the processed partial packet context with the packet context to provide a processed packet context.

Some embodiments of the invention provide a a method of processing packets associated with a logical switching element implemented by multiple physical switching elements executing on multiple host computers on which multiple machines execute. At a first physical switching element of a first host computer, the method receives a packet from a first machine associated with the logical switching element. For the packet, the method identifies a logical ingress port of the logical switch that is associated with the packet. For the packet, the method also uses the logical ingress port to identify a logical egress port of the logical switch that is associated with the packet. For the packet, the method also uses the logical egress port to identify a physical egress port of the first host computer to use to send the packet along to a second machine associated with the logical egress port. From the identified physical egress port, the method forwards the packet with an encapsulating header that stores the logical egress port.

The present disclosure relates to an on-chip network design method for a distributed parallel operation algorithm. According to a distributed parallel operation algorithm of an on-chip network, the on-chip network is divided into two layers, including a unicast network and a multicast network, where the unicast network is configured to implement point-to-point propagation between nodes and transmit independent operation data required by operation nodes to each operation node in a form of unicast; and the multicast network is a customized multicast network for the distributed parallel operation algorithm and configured to transmit common operation data to all the operation nodes, such that a data packet in the network is efficiently transmitted through a combination of the unicast network and the multicast network. By designing a multicast tree transmission architecture for the distributed parallel operation algorithm, a bidirectional replication node or a receiving node is disposed in each operation node.

Example methods and systems for a programmable virtual network interface controller (VNIC) to perform packet processing are described. In one example, the programmable VNIC may modify a packet processing pipeline based on the instruction. The modification may include injecting a second packet processing stage among the multiple first packet processing stages of the packet processing pipeline. In response to detecting an ingress packet that requires processing by the programmable VNIC, the ingress packet may be steered towards the modified packet processing pipeline. The ingress packet may then be processed using the modified packet processing pipeline by performing the second packet processing stage (a) to bypass at least one of the multiple first processing stages, or (b) in addition to the multiple first processing stages.

A data transmission circuit and method, a core, a chip with a multi-core structure, an electronic device and a storage medium are provided. The data transmission circuit includes a receiver, a controller, a lookup table circuit and a selector. The receiver is configured to receive an original data packet from Fabric; the controller is configured to determine whether the original data packet needs to be relayed according to an original control bit, and control a first input terminal of the selector to be enabled in response to that the original data packet needs to be relayed; the selector is configured to send a new data packet to the Fabric via the first input terminal, wherein the new data packet includes the original data and a new header acquired by the lookup table circuit according to an original index. In this way, power consumption of the data transmission circuit is reduced.

A collection of rules comprising fields that may have wildcard values. The method includes defining first and second subsets of the fields, the second subset being exclusive of the first subset. Intersections of overlapping fields of the first subset are added to the first subset to form an augmented first subset. Metadata from the augmented first subset and the fields not selected for the first subset are combined to define second parts of the rules. Data items are classified by matching a search key to one of the first parts and one of the second parts of the rules.

Some embodiments provide a method for handling failure at one of several peer centralized components of a logical router. At a first one of the peer centralized components of the logical router, the method detects that a second one of the peer centralized components has failed. In response to the detection, the method automatically identifies a network layer address of the failed second peer. The method assumes responsibility for data traffic to the failed peer by broadcasting a message on a logical switch that connects all of the peer centralized components and a distributed component of the logical router. The message instructs recipients to associate the identified network layer address with a data link layer address of the first peer centralized component.

In order to provide flexible scaling and dynamic reconfiguration, a wireless local area network controller includes a virtual dataplane with one or more virtual machines. These virtual machines pre-calculate processing parameters for packets in a data flow. For example, the pre-calculated processing parameters may include: encapsulation parameters, quality-of-service parameters and priority parameters. Subsequently, when one of the virtual machines receives a packet in the data flow on an input port, the virtual machine modifies information in a header of the packet based on one or more of the pre-calculated processing parameters and information associated with the data flow (which specifies the one or more pre-calculated processing parameters). Then, the virtual machine transmits the packet on an output port. In this way, the virtual machine maintains a fixed inter-packet time between packets in the data flow.

Described herein are systems and methods for traffic classification that integrate a plurality of different types of traffic classifiers in parallel so that there is little or no adverse effects on data path performance. The systems and methods also integrate a plurality of complementary tiered classifiers to improve or enhance the results of a primary classification technique. Results from the individual parallel and tiered traffic classifiers can be analyzed to determine an output classification. The resulting output traffic classification can be used to determine a preferred or desirable link between nodes on a network where the network includes parallel links or network paths between the nodes. The disclosed systems and methods may be particularly advantageous where the different network paths have different characteristics such as latency, capacity, congestion, cost, bandwidth, etc.

A method of identifying a failed egress path of a hardware forwarding element. The method detects an egress link failure in a data plane of the forwarding element. The method generates a link failure signal in the data plane identifying the failed egress link. The method generates a packet that includes the identification of the egress link based on the link failure signal. The method sets the status of the egress link to failed in the data plane based on the identification of the egress link in the generated packet.