A first memory device stores (i) a head part of a FIFO queue structured as a linked list (LL) of LL elements arranged in an order in which the LL elements were added to the FIFO queue and (ii) a tail part of the FIFO queue. A second memory device stores a middle part of the FIFO queue, the middle part comprising a LL elements following, in an order, the head part and preceding, in the order, the tail part. A queue controller retrieves LL elements in the head part from the first memory device, moves LL elements in the middle part from the second memory device to the head part in the first memory device prior to the head part becoming empty, and updates LL parameters corresponding to the moved LL elements to indicate storage of the moved LL elements changing from the second memory device to the first memory device.

Embodiments of the application describe a packet processing method and a router. The method includes: receiving, by an input line card, at least one packet; obtaining, by the input line card, information about an available first buffer block in a third buffer module, where the third buffer module is a first buffer module that includes an available first buffer block; allocating, by the input line card, a third buffer block to each of the at least one packet based on at least one buffer information block stored in the input line card and the information about an available first buffer block; and buffering, by the input line card, each packet into the third buffer block. Distributed packet buffering can be implemented by using the method.

A multicast rule is represented in a hierarchical linked list with N tiers. Each tier or level in the hierarchical linked list corresponds to a network layer of a network stack that requires replication. Redundant groups in each tier are eliminated such that the groups in each tier are stored exactly once in a replication table. A multicast replication engine traverses the hierarchical linked list and replicates a packet according to each node in the hierarchical linked list.

A queue management method and apparatus are disclosed. The queue management method includes: storing a first packet to a first buffer cell included in a first macrocell, where the first macrocell is enqueued to a first entity queue, the first macrocell includes N consecutive buffer cells, and the first buffer cell belongs to the N buffer cells; correcting, based on a packet length of the first packet, an average packet length in the first macrocell that is obtained before the first packet is stored, to obtain a current average packet length in the first macrocell; and generating, based on the first macrocell and the first entity queue, queue information corresponding to the first macrocell of the first macrocell in the first entity queue, a head pointer in the first macrocell, a tail pointer in the first macrocell, and the current average packet length in the first macrocell.

A method for displaying an animation by a display chip of an electronic device, which includes a non-volatile memory and a random-access memory. The display chip includes a video output register and a display register. The method includes a first static programming phase including configuring the video output register; writing n images in the memory, n being an integer higher than or equal to two; writing into the memory of a plurality of nodes, such that each node includes the address in the memory of at least one portion of an image, as well as the address of the following node in the memory, the last node including the address in the random-access memory of the first node; and configuring the display register. The method also includes a second phase in which the n images are read by the display chip by the display register, to display the animation.

An adaptive generic receive offload (A-GRO) system and method are disclosed. In some embodiments, the system comprises a host including a host protocol stack and a host memory, and a network interface card that is communicatively connectable to the host. The A-GRO system is configured to: receive a packet from a network, parse the packet to a header and a payload, classify and map the packet into a particular flow based on contexts associated with a plurality of flows and the header, and move the header and the payload to separate queues associated with the particular flow in the host memory, without holding and stalling the packet in hardware of the NIC. By maintain packet coherence information including header chains, the A-GRO allows the host to skip processing the packets between the first and last headers in a GRO aggregation. The A-GRO system also improves mis-ordering packet handling.

A multicast rule is represented in a hierarchical linked list with N tiers. Each tier or level in the hierarchical linked list corresponds to a network layer of a network stack that requires replication. Redundant groups in each tier are eliminated such that the groups in each tier are stored exactly once in a replication table. A multicast replication engine traverses the hierarchical linked list and replicates a packet according to each node in the hierarchical linked list.

A first memory device stores (i) a head part of a FIFO queue structured as a linked list (LL) of LL elements arranged in an order in which the LL elements were added to the FIFO queue and (ii) a tail part of the FIFO queue. A second memory device stores a middle part of the FIFO queue, the middle part comprising a LL elements following, in an order, the head part and preceding, in the order, the tail part. A queue controller retrieves LL elements in the head part from the first memory device, moves LL elements in the middle part from the second memory device to the head part in the first memory device prior to the head part becoming empty, and updates LL parameters corresponding to the moved LL elements to indicate storage of the moved LL elements changing from the second memory device to the first memory device.

Technologies for network packet processing include a computing device that receives incoming network packets. The computing device adds the incoming network packets to an input lockless shared ring, and then classifies the network packets. After classification, the computing device adds the network packets to multiple lockless shared traffic class rings, with each ring associated with a traffic class and output port. The computing device may allocate bandwidth between network packets active during a scheduling quantum in the traffic class rings associated with an output port, schedule the network packets in the traffic class rings for transmission, and then transmit the network packets in response to scheduling. The computing device may perform traffic class separation in parallel with bandwidth allocation and traffic scheduling. In some embodiments, the computing device may perform bandwidth allocation and/or traffic scheduling on each traffic class ring in parallel. Other embodiments are described and claimed.

A method for transmitting structured data between a data-transmitting module and a data-receiving module. The structured data are structured as data blocks. The method uses a memory region for storing the data using the data-transmitting module and for reading the data using the data-receiving module to transmit data from the data-transmitting module to the data-receiving module. Data blocks in each case include a first field with an address, and at least one further field for storing links to further data blocks, so that a list of interlinked data blocks can be formed. An access data memory stores a start pointer to a first data block of the list and stores an end pointer to a last data block of the list.