A hardware module comprises at least a first ingress buffer and a second ingress buffer, where the second ingress buffer holds data packets from a plurality of source components. To ensure fairness between one or more sources providing data to the first ingress buffer and the plurality of sources providing data to the second ingress buffer, processing circuitry examines source identifiers in packets held in the second ingress buffer and selects between the buffers so as to arbitrate between the sources. In some embodiments, the examination of the source identifiers provides statistics for a weighted round robin between the ingress buffers. In other embodiments, the source identifier of whichever packet is currently at the head of the second ingress buffer is used to perform a simple round robin between the sources.

Systems and devices can include a controller and a command queue to buffer incoming write requests into the device. The controller can receive, from a client across a link, a non-posted write request (e.g., a deferred memory write (DMWr) request) in a transaction layer packet (TLP) to the command queue; determine that the command queue can accept the DMWr request; identify, from the TLP, a successful completion (SC) message that indicates that the DMWr request was accepted into the command queue; and transmit, to the client across the link, the SC message that indicates that the DMWr request was accepted into the command queue. The controller can receive a second DMWr request in a second TLP; determine that the command queue is full; and transmit a memory request retry status (MRS) message to be transmitted to the client in response to the command queue being full.

An apparatus is described. The apparatus includes queue assignment circuitry. The queue assignment circuitry includes first circuitry to select amongst multiple hash keys and second circuitry to hash content of a packet's header with a selected one of the hash keys.

An apparatus is described. The apparatus includes queue assignment circuitry. The queue assignment circuitry includes first circuitry to select amongst multiple hash keys and second circuitry to hash content of a packet's header with a selected one of the hash keys.

Methods and systems are provided for performing lossy dropping and ECN marking in a flow-based network. The system can maintain state information of individual packet flows, which can be set up or released dynamically based on injected data. Each flow can be provided with a flow-specific input queue upon arriving at a switch. Packets of a respective flow are acknowledged after reaching the egress point of the network, and the acknowledgement packets are sent back to the ingress point of the flow along the same data path. As a result, each switch can obtain state information of each flow and perform per-flow packet dropping and ECN marking.

A packet forwarding device and a queue management method are provided. The queue management method is applicable to a plurality of priority queues each associated with a different transmission priority. The queue management method includes: allocating at least one buffer from a free buffer pool to each of the priority queues; monitoring a number of dropped packets of an observation queue of the priority queues; and increasing a number of buffers for the observation queue and decreasing a number of buffers for at least one of the priority queues which has a lower transmission priority than the observation queue, according to the number of dropped packets.

A packet forwarding device and a queue management method are provided. The queue management method is applicable to a plurality of priority queues each associated with a different transmission priority. The queue management method includes: allocating at least one buffer from a free buffer pool to each of the priority queues; monitoring a number of dropped packets of an observation queue of the priority queues; and increasing a number of buffers for the observation queue and decreasing a number of buffers for at least one of the priority queues which has a lower transmission priority than the observation queue, according to the number of dropped packets.

Systems and devices can include a controller and a command queue to buffer incoming write requests into the device. The controller can receive, from a client across a link, a non-posted write request (e.g., a deferred memory write (DMWr) request) in a transaction layer packet (TLP) to the command queue; determine that the command queue can accept the DMWr request; identify, from the TLP, a successful completion (SC) message that indicates that the DMWr request was accepted into the command queue; and transmit, to the client across the link, the SC message that indicates that the DMWr request was accepted into the command queue. The controller can receive a second DMWr request in a second TLP; determine that the command queue is full; and transmit a memory request retry status (MRS) message to be transmitted to the client in response to the command queue being full.

Methods, systems, and computer programs are presented for processing Ethernet packets at a Field Programmable Gate Array (FPGA). One programmable integrated circuit includes: an internal network on chip (iNOC) comprising rows and columns; clusters, coupled to the iNOC, comprising a network access point (NAP) and programmable logic; and an Ethernet controller coupled to the iNOC. When the controller operates in packet mode, each complete inbound Ethernet packet is sent from the controller to one of the NAPs via the iNOC, where two or more NAPs are configurable to receive the complete inbound Ethernet packets from the controller. The controller is configurable to operate in quad segment interface (QSI) mode where each complete inbound Ethernet packet is broken into segments, which are sent from the controller to different NAPs via the iNOC, where two or more NAPs are configurable to receive the complete inbound Ethernet packets from the controller.

The disclosure includes embodiments for a connected vehicle to form a vehicular micro cloud. In some embodiments, a method includes determining, by an onboard vehicle computer, that a queue is present in a roadway environment and that a vehicle that includes the onboard vehicle computer is present in the queue. The method includes causing a set of member vehicles to form a vehicular micro cloud in the roadway environment responsive to determining that the queue is present in the roadway environment so that determining that the queue is present triggers a formation of the vehicular micro cloud, where the vehicular micro cloud includes a set of vehicles which each share all of their unused vehicular computing resources with one another to generate a pool of vehicular computing resources that exceeds a total vehicular computing resources of any single member vehicle and is used to benefit the set of member vehicles.