A switch equipped with a self-managing reduction engine is provided. During operation, the reduction engine can use a timeout mechanism to manage itself in different latency-induced or error scenarios. As a result, the network can facilitate an efficient and scalable environment for high performance computing.

A switch equipped with a self-managing reduction engine is provided. During operation, the reduction engine can use a timeout mechanism to manage itself in different latency-induced or error scenarios. As a result, the network can facilitate an efficient and scalable environment for high performance computing.

A regular buffer and a shadow buffer are maintained at a receiver host. Responsive to receiving a data flow from a sender host that is clock-synchronized with the receiver host using a common reference clock, a first indication of data of the data flow is stored to the regular buffer, the shadow buffer is transitioned from an idle state to an active state, and a counter of the shadow buffer is incremented that indicates a unit of data traffic received. A dynamic drain rate is determined based on a number of units of the data removed from the regular buffer per unit of time while the shadow buffer is in the active state, where the shadow buffer reverts to an idle state responsive to a break in the receiver host receiving the data flow. Dwell time is calculated as a function of the counter of the shadow buffer and the dynamic drain rate, and a congestion signal for the data flow is determined based on the dwell time.

A regular buffer and a shadow buffer are maintained at a receiver host. Responsive to receiving a data flow from a sender host that is clock-synchronized with the receiver host using a common reference clock, a first indication of data of the data flow is stored to the regular buffer, the shadow buffer is transitioned from an idle state to an active state, and a counter of the shadow buffer is incremented that indicates a unit of data traffic received. A dynamic drain rate is determined based on a number of units of the data removed from the regular buffer per unit of time while the shadow buffer is in the active state, where the shadow buffer reverts to an idle state responsive to a break in the receiver host receiving the data flow. Dwell time is calculated as a function of the counter of the shadow buffer and the dynamic drain rate, and a congestion signal for the data flow is determined based on the dwell time.

A processor having kernel space and user space and a method is provided. The method includes receiving in the user space at least one interface statistic about each hardware interface of one or more hardware interfaces receiving packets, wherein the at least one interface statistic is provided from the hardware interface. The method further includes dynamically adjusting, from within the user space, a priority at which each of the one or more hardware interfaces is polled as a function of the at least one interface statistic.

A processor having kernel space and user space and a method is provided. The method includes receiving in the user space at least one interface statistic about each hardware interface of one or more hardware interfaces receiving packets, wherein the at least one interface statistic is provided from the hardware interface. The method further includes dynamically adjusting, from within the user space, a priority at which each of the one or more hardware interfaces is polled as a function of the at least one interface statistic.

A network interface controller (NIC) capable of efficiently utilizing an output buffer is provided. The NIC can be equipped with an output buffer, a host interface, an injector logic block, and an allocation logic block. The output buffer can include a plurality of cells, each of which can be a unit of storage in the output buffer. If the host interface receives a command from a host device, the injector logic block can generate a packet based on the command. The allocation logic block can then determine whether the packet is a multi-cell packet. If the packet is a multi-cell packet, the allocation logic block can determine a virtual index for the packet. The allocation logic block can then store, in an entry in a data structure, the virtual index, and a set of physical indices of cells storing the packet.

A network interface controller (NIC) capable of efficiently utilizing an output buffer is provided. The NIC can be equipped with an output buffer, a host interface, an injector logic block, and an allocation logic block. The output buffer can include a plurality of cells, each of which can be a unit of storage in the output buffer. If the host interface receives a command from a host device, the injector logic block can generate a packet based on the command. The allocation logic block can then determine whether the packet is a multi-cell packet. If the packet is a multi-cell packet, the allocation logic block can determine a virtual index for the packet. The allocation logic block can then store, in an entry in a data structure, the virtual index, and a set of physical indices of cells storing the packet.

A data-driven intelligent networking system that can facilitate global fairness is provided. The system can maintain state information of individual packet flows, which can be set up or released dynamically based on injected data. Each flow can be provided with a flow-specific input queue upon arriving at a switch. Packets of a respective flow are acknowledged after reaching the egress point of the network, and the acknowledgement packets are sent back to the ingress point of the flow along the same data path. As a result, each switch can obtain state information of each flow and enforce global fairness on a per-flow basis.

A data-driven intelligent networking system that can facilitate global fairness is provided. The system can maintain state information of individual packet flows, which can be set up or released dynamically based on injected data. Each flow can be provided with a flow-specific input queue upon arriving at a switch. Packets of a respective flow are acknowledged after reaching the egress point of the network, and the acknowledgement packets are sent back to the ingress point of the flow along the same data path. As a result, each switch can obtain state information of each flow and enforce global fairness on a per-flow basis.