H04L49/9047

Apparatus and buffer control method thereof in wireless communication system

A 5G communication system or pre-5G communication system for supporting a higher data rate than that of a beyond 4G communication system such as an LTE is provided. A method by an apparatus for controlling buffers in a wireless communication system comprises storing information related to a packet in at least one of a first buffer or a second buffer, transmitting data generated based on the packet, and, when an acknowledgement signal is received for the data, discarding the information.

Fair Arbitration Between Multiple Sources Targeting a Destination
20230144797 · 2023-05-11 ·

A hardware module comprises at least a first ingress buffer and a second ingress buffer, where the second ingress buffer holds data packets from a plurality of source components. To ensure fairness between one or more sources providing data to the first ingress buffer and the plurality of sources providing data to the second ingress buffer, processing circuitry examines source identifiers in packets held in the second ingress buffer and selects between the buffers so as to arbitrate between the sources. In some embodiments, the examination of the source identifiers provides statistics for a weighted round robin between the ingress buffers. In other embodiments, the source identifier of whichever packet is currently at the head of the second ingress buffer is used to perform a simple round robin between the sources.

Fair Arbitration Between Multiple Sources Targeting a Destination
20230144797 · 2023-05-11 ·

A hardware module comprises at least a first ingress buffer and a second ingress buffer, where the second ingress buffer holds data packets from a plurality of source components. To ensure fairness between one or more sources providing data to the first ingress buffer and the plurality of sources providing data to the second ingress buffer, processing circuitry examines source identifiers in packets held in the second ingress buffer and selects between the buffers so as to arbitrate between the sources. In some embodiments, the examination of the source identifiers provides statistics for a weighted round robin between the ingress buffers. In other embodiments, the source identifier of whichever packet is currently at the head of the second ingress buffer is used to perform a simple round robin between the sources.

Wide elastic buffer

A receiving device uses an elastic buffer that is wider than the number of data elements transferred in each cycle. To compensate for frequency differences between the transmitter and the receiver, the transmitting device periodically sends a skip request with a default number of skip data elements. If the elastic buffer is filling, the receiving device ignores one or more of the skip data elements. If the elastic buffer is emptying, the receiving device adds one or more skip data elements to the skip request. To maintain the ordering of data despite the manipulation of the skip data elements, two rows of the wide elastic buffer are read at a time. This allows construction of a one-row result from any combination of the data elements of the two rows. The column pointers are adjusted appropriately, to ensure that they continue to point to the next data to be read.

Technologies for jitter-adaptive low-latency, low power data streaming between device components

Technologies for low-latency data streaming include a computing device having a processor that includes a producer and a consumer. The producer generates a data item, and in a local buffer producer mode adds the data item to a local buffer, and in a remote buffer producer mode adds the data item to a remote buffer. When the local buffer is full, the producer switches to the remote buffer producer mode, and when the remote buffer is below a predetermined low threshold, the producer switches to the local buffer producer mode. The consumer reads the data item from the local buffer while operating in a local buffer consumer mode and reads the data item from the remote buffer while operating in a remote buffer consumer mode. When the local buffer is above a predetermined high threshold, the consumer may switch to a catch-up operating mode. Other embodiments are described and claimed.

Receive buffer management

Examples described herein can be used to allocate replacement receive buffers for use by a network interface, switch, or accelerator. Multiple refill queues can be used to receive identifications of available receive buffers. A refill processor can select one or more identifications from a refill queue and allocate the identifications to a buffer queue. None of the refill queues is locked from receiving identifications of available receive buffers but merely one of the refill buffers is accessed at a time to provide identifications of available receive buffers. Identifications of available receive buffers from the buffer queue are provide to the network interface, switch, or accelerator to store content of received packets.

Methods and apparatus for memory resource management in a network device
09838341 · 2017-12-05 · ·

A network device determines whether a utilization threshold is reached, the utilization threshold associated with memory resources of the network device, the memory resources including a shared memory and a reserved memory. Available memory in the shared memory is available for any egress interfaces in a plurality of egress interfaces, and the reserved memory includes respective sub-pools for exclusive use by respective egress interfaces among at least some of the plurality of egress interfaces. First packets to be transmitted are stored in the shared memory until a utilization threshold is reached, and in response to determining that the utilization threshold is reached, a second packet to be transmitted is stored in the reserved memory.

Page fault support for virtual machine network accelerators
11500668 · 2022-11-15 · ·

Systems and methods for supporting page faults for virtual machine network accelerators. In one implementation, a processing device may receive, at a network accelerator device of a computer system, a first incoming packet from a network. The processing device may select a first buffer from a plurality of buffers associated with the network device, and may attempt to store the first incoming packet at the first buffer. Responsive to receiving a notification that the attempt to store the first incoming packet at the first buffer caused a page fault, the processing device may store the first incoming packet at a second buffer. The processing device may receive a second incoming packet, and store the second incoming packet at the first buffer. The processing device may forward, to a driver of the network accelerator device, a first identifiers of the second buffer and a second identifier of the first buffer.

SYSTEM AND METHOD FOR FACILITATING DATA-DRIVEN INTELLIGENT NETWORK WITH INGRESS PORT INJECTION LIMITS

Data-driven intelligent networking systems and methods are provided. The system can accommodate dynamic traffic while applying injection limits to different traffic classes at an ingress edge port. The system can maintain state information of individual packet flows, which can be set up or released dynamically based on injected data. Each flow can be provided with a flow-specific input queue upon arriving at a switch. Packets of a respective flow can be acknowledged after reaching the egress point of the network, and the acknowledgement packets can be sent back to the ingress point of the flow along the same data path. Furthermore, an edge switch can dynamically allocate the ingress port bandwidth among the traffic classes that are active at a given moment.

SYSTEM AND METHOD FOR DATA LOSS AND DATA LATENCY MANAGEMENT IN A NETWORK-ON-CHIP WITH BUFFERED SWITCHES
20220353205 · 2022-11-03 · ·

A buffered switch system for end-to-end data congestion and traffic drop prevention. More specifically, and without limitation, the various aspects and embodiments of the invention relates to the management of buffered switch to prevent the balancing act of buffer sizing, latency, and traffic drop.