Patent classifications
H04L49/9047
PAGE FAULT SUPPORT FOR VIRTUAL MACHINE NETWORK ACCELERATORS
Systems and methods for supporting page faults for virtual machine network accelerators. In one implementation, a processing device may receive, at a network accelerator device of a computer system, a first incoming packet from a network. The processing device may select a first buffer from a plurality of buffers associated with the network device, and may attempt to store the first incoming packet at the first buffer. Responsive to receiving a notification that the attempt to store the first incoming packet at the first buffer caused a page fault, the processing device may store the first incoming packet at a second buffer. The processing device may receive a second incoming packet, and store the second incoming packet at the first buffer. The processing device may forward, to a driver of the network accelerator device, a first identifiers of the second buffer and a second identifier of the first buffer.
Packet filtering using binary search trees
A packet filtering system uses linked zero-based binary search trees to filter received packets. The binary search trees may be generated from filter conditions defining filter parameters for filtering packets.
Packet filtering using binary search trees
A packet filtering system uses linked zero-based binary search trees to filter received packets. The binary search trees may be generated from filter conditions defining filter parameters for filtering packets.
DEPLOYING SHADOW BUFFER IN CONTEXT OF CLOCK-SYNCHRONIZED EDGE-BASED NETWORK FUNCTIONS
A regular buffer and a shadow buffer are maintained at a receiver host. Responsive to receiving a data flow from a sender host that is clock-synchronized with the receiver host using a common reference clock, a first indication of data of the data flow is stored to the regular buffer, the shadow buffer is transitioned from an idle state to an active state, and a counter of the shadow buffer is incremented that indicates a unit of data traffic received. A dynamic drain rate is determined based on a number of units of the data removed from the regular buffer per unit of time while the shadow buffer is in the active state, where the shadow buffer reverts to an idle state responsive to a break in the receiver host receiving the data flow. Dwell time is calculated as a function of the counter of the shadow buffer and the dynamic drain rate, and a congestion signal for the data flow is determined based on the dwell time.
DEPLOYING SHADOW BUFFER IN CONTEXT OF CLOCK-SYNCHRONIZED EDGE-BASED NETWORK FUNCTIONS
A regular buffer and a shadow buffer are maintained at a receiver host. Responsive to receiving a data flow from a sender host that is clock-synchronized with the receiver host using a common reference clock, a first indication of data of the data flow is stored to the regular buffer, the shadow buffer is transitioned from an idle state to an active state, and a counter of the shadow buffer is incremented that indicates a unit of data traffic received. A dynamic drain rate is determined based on a number of units of the data removed from the regular buffer per unit of time while the shadow buffer is in the active state, where the shadow buffer reverts to an idle state responsive to a break in the receiver host receiving the data flow. Dwell time is calculated as a function of the counter of the shadow buffer and the dynamic drain rate, and a congestion signal for the data flow is determined based on the dwell time.
Network device and conversion apparatus
A network device includes a switch chip and a CPU, wherein the switch chip at least includes a CPU interface, and the CPU at least includes a media access controller and a Buffer. The network device further includes a conversion apparatus. The conversion apparatus receives a first packet uploaded by the switch chip to the CPU through the CPU interface, obtains a second packet by migrating a private information header in an Ethernet header of the first packet to a specified position of the first packet, calculates a Cyclic Redundancy Check, CRC, code of the second packet, obtains a third packet by replacing a CRC code already carried in the second packet with the calculated CRC code, and sends the third packet to the Buffer on the CPU for buffering, wherein the specified position is a position other than the Ethernet header in the first packet.
Network device and conversion apparatus
A network device includes a switch chip and a CPU, wherein the switch chip at least includes a CPU interface, and the CPU at least includes a media access controller and a Buffer. The network device further includes a conversion apparatus. The conversion apparatus receives a first packet uploaded by the switch chip to the CPU through the CPU interface, obtains a second packet by migrating a private information header in an Ethernet header of the first packet to a specified position of the first packet, calculates a Cyclic Redundancy Check, CRC, code of the second packet, obtains a third packet by replacing a CRC code already carried in the second packet with the calculated CRC code, and sends the third packet to the Buffer on the CPU for buffering, wherein the specified position is a position other than the Ethernet header in the first packet.
NETWORK DEVICE AND CONVERSION APPARATUS
A network device includes a switch chip and a CPU, wherein the switch chip at least includes a CPU interface, and the CPU at least includes a media access controller and a Buffer. The network device further includes a conversion apparatus. The conversion apparatus receives a first packet uploaded by the switch chip to the CPU through the CPU interface, obtains a second packet by migrating a private information header in an Ethernet header of the first packet to a specified position of the first packet, calculates a Cyclic Redundancy Check, CRC, code of the second packet, obtains a third packet by replacing a CRC code already carried in the second packet with the calculated CRC code, and sends the third packet to the Buffer on the CPU for buffering, wherein the specified position is a position other than the Ethernet header in the first packet.
Automated configuration based deployment of stream processing pipeline
Techniques for generating a stream processing pipeline are provided. In one embodiment, a method includes receiving a configuration file from a data service. The configuration file represents a pipeline configuration of the stream processing pipeline, and the pipeline configuration includes representations of a plurality of different types of pipeline stages configured based on a respective customization of an entity. The method further includes generating a plurality of pipeline stages in accordance with the pipeline configuration of the stream processing pipeline; collecting, at one or more pipeline stages of a first-type in the stream processing pipeline, data items from one or more data sources; processing the collected data items at one or more pipeline stages of a second-type in the stream processing pipeline; and transmitting, at one or more pipeline stages of a third-type in the stream processing pipeline, the processed data items to the data service.
UTILIZING COHERENTLY ATTACHED INTERFACES IN A NETWORK STACK FRAMEWORK
Embodiments for implementing an enhanced network stack framework in a computing environment. A plurality of network buffers coherently attached between one or more applications and a network interface may be shared while bypassing one or more drivers and an operating systems using an application buffer, a circular buffer and a queuing and pooling operation.