Provided are a vision sensor, an image processing device including the same, and an operating method of the vision sensor. The vision sensor includes a pixel array including a plurality of pixels, a synchronization control module configured to receive a synchronization signal from an external image sensor and generate an internal trigger signal based on the synchronization signal, an event detection circuit configured to receive the internal trigger signal and detect whether an event has occurred in the plurality of pixels and generate event signals corresponding to pixels in which the event has occurred, and an interface circuit configured to receive the event signals and transmit to an external processor vision sensor data based on the trigger signal and at least one of the event signals, where the vision sensor data includes matching information for timing image frame information generated by the image sensor and the event signals generated by the vision sensor.

Provided are a vision sensor, an image processing device including the same, and an operating method of the vision sensor. The vision sensor includes a pixel array including a plurality of pixels, a synchronization control module configured to receive a synchronization signal from an external image sensor and generate an internal trigger signal based on the synchronization signal, an event detection circuit configured to receive the internal trigger signal and detect whether an event has occurred in the plurality of pixels and generate event signals corresponding to pixels in which the event has occurred, and an interface circuit configured to receive the event signals and transmit to an external processor vision sensor data based on the trigger signal and at least one of the event signals, where the vision sensor data includes matching information for timing image frame information generated by the image sensor and the event signals generated by the vision sensor.

In a phase adjustment circuit, a binary circuit is configured to output a binary signal on the basis of an edge of a video signal. A phase-delayed clock signal generation circuit is configured to generate a phase-delayed clock signal having a later phase than a phase of a clock signal by a first delay amount. A delay time control circuit is configured to cause a phase of the binary signal and the phase of the phase-delayed clock signal to match each other by adjusting the first delay amount. A sampling signal generation circuit is configured to generate a sampling signal having a later phase than the phase of the clock signal by a second delay amount. The second delay amount is in accordance with both a phase shift amount, which is based on the clock signal, and the first delay amount.

A signal processing method includes: obtaining a first frame synchronization signal including a plurality of first pulses, a period between a trailing edge of a first pulse and a leading edge of a next first pulse being a first time period, which corresponding to a first integer number of pulses of a first pixel clock signal; generating a synchronization calibration signal including a plurality of second pulses, a trigger edge of each second pulse being at a same time as the trailing edge of the first pulse; and generating a second frame synchronization signal including a plurality of third pulses, a period between the trigger edge of each second pulse and a leading edge of a third pulse closest to the second pulse after the second pulse being a second time period, which corresponding to a first integer number of pulses of the second pixel clock signal.

A signal processing method includes: obtaining a first frame synchronization signal including a plurality of first pulses, a period between a trailing edge of a first pulse and a leading edge of a next first pulse being a first time period, which corresponding to a first integer number of pulses of a first pixel clock signal; generating a synchronization calibration signal including a plurality of second pulses, a trigger edge of each second pulse being at a same time as the trailing edge of the first pulse; and generating a second frame synchronization signal including a plurality of third pulses, a period between the trigger edge of each second pulse and a leading edge of a third pulse closest to the second pulse after the second pulse being a second time period, which corresponding to a first integer number of pulses of the second pixel clock signal.

A control system for a laser scanning projector includes a mirror controller generating horizontal and vertical mirror synchronization signals for an oscillating mirror apparatus based upon a mirror clock signal, and laser modulation circuitry. The laser modulation circuitry generates horizontal and vertical laser synchronization signals as a function of a received laser clock signal, and generates control signals for a laser that emits a laser beam that impinges on the oscillating mirror apparatus. Synchronization circuitry generates the laser clock signal and sends the laser clock signal to the laser modulation circuitry, receives the horizontal and vertical mirror synchronization signals from the mirror controller, receives the horizontal and vertical laser synchronization signals from the laser modulation circuitry, and modifies the laser clock signal so as to achieve alignment between the horizontal and vertical mirror synchronization signals and the horizontal and vertical laser synchronization signals.

A control system for a laser scanning projector includes a mirror controller generating horizontal and vertical mirror synchronization signals for an oscillating mirror apparatus based upon a mirror clock signal, and laser modulation circuitry. The laser modulation circuitry generates horizontal and vertical laser synchronization signals as a function of a received laser clock signal, and generates control signals for a laser that emits a laser beam that impinges on the oscillating mirror apparatus. Synchronization circuitry generates the laser clock signal and sends the laser clock signal to the laser modulation circuitry, receives the horizontal and vertical mirror synchronization signals from the mirror controller, receives the horizontal and vertical laser synchronization signals from the laser modulation circuitry, and modifies the laser clock signal so as to achieve alignment between the horizontal and vertical mirror synchronization signals and the horizontal and vertical laser synchronization signals.

A method and system for synchronizing an audio signal and a video signal includes a source device receiving an audio-video signal comprising the audio signal and the video signal. The video signal has a video time stamp. The source device communicates the audio signal from the source device to a first sink device through a wireless network with a second time stamp and communicates the video signal to the second sink device with the video time stamp. The second sink device generates a synchronization (synch) signal and communicates the synch signal to the first sink device. The first sink device compares the synch signal to the second time stamp, adjusts a relative timing of the playback of the audio signal in response to comparing and generates an audible signal from the audio signal.

A method and system for synchronizing an audio signal and a video signal includes a source device receiving an audio-video signal comprising the audio signal and the video signal. The video signal has a video time stamp. The source device communicates the audio signal from the source device to a first sink device through a wireless network with a second time stamp and communicates the video signal to the second sink device with the video time stamp. The second sink device generates a synchronization (synch) signal and communicates the synch signal to the first sink device. The first sink device compares the synch signal to the second time stamp, adjusts a relative timing of the playback of the audio signal in response to comparing and generates an audible signal from the audio signal.

The present technology relates to a solid-state imaging device, a signal processing chip, and an electronic apparatus that make it possible to utilize the result of detecting an occurrence of an event in imaging. The solid-state imaging device includes: an event detection unit that detects, as an event, a change in an electrical signal generated by each pixel of a pixel array unit; a region-of-interest detection unit that detects, from a result of detecting the event, a region-of-interest of the pixel array unit; and a pixel signal generation unit that generates a pixel signal constituting an image of a region corresponding to the region-of-interest. The present technology is applicable to, for example, a sensor that detects an event that is a change in an electrical signal of a pixel.