A solid-state imaging device includes: pixels disposed in a matrix of pixel rows and pixel columns; control wires provided for the pixel rows or the pixel columns, and each connected to at least two pixels out of the pixels, the at least two pixels being included in one of the pixel rows or the pixel columns for which the control wire is provided; drive circuits that are provided for the control wires, each include buffer elements in at least two stages, and each output a control signal to one of the control wires for which the drive circuit is provided, the buffer elements in the at least two stages being connected in series; and a first wire that short-circuits output wires of the buffer elements in one of the at least two stages in at least two of the plurality of drive circuits.

An imaging device includes a photoelectric conversion layer having a first surface and a second surface opposite to the first surface; a counter electrode on the first surface; a first electrode on the second surface; a second electrode on the second surface, the second electrode being spaced from the first electrode; and an auxiliary electrode on the second surface between the first electrode and the second electrode. The auxiliary electrode is spaced from the first electrode and the second electrode, where a shortest distance between the first electrode and the auxiliary electrode is different from a shortest distance between the second electrode and the auxiliary electrode.

A pixel readout circuit and a technique for imaging are disclosed. The circuit includes: an array of pixel integration circuits, each adapted for receiving an electric signal indicative of photocurrent of light sensitive pixel of a pixel matrix, integrate the electric signal over a frame period, and output the integrated signal at an imaging frame rate being one over the period; and an array of pixel derivation circuits, each includes a signal preprocessing channel for receiving a total electric signal indicative of at least a component of the photocurrent(s) of a cluster of respective light sensitive pixel(s); and a comparison unit adapted to analyze the total electric signal to determine digital data indicative of a change in the total electric signal relative to one or more thresholds; and a digital output utility adapted to readout of the digital data at a second rate different than the frame rate.

A method operable by circuitry including an image processor, an image sensor, and another clock-dependent device, including measuring a flicker using the image sensor, adjusting a clock rate of the circuitry according to the measured flicker, and operating the clock-dependent device using the adjusted clock rate.

An image sensor includes a plurality of pixels. Each pixel includes a photoelectric conversion portion, a reset gate for controlling removal of a charge accumulated in the photoelectric conversion portion, a charge accumulation portion, an accumulation gate for controlling a transfer of the charge from the photoelectric conversion portion to the charge accumulation portion, and a readout gate for controlling readout of the charge from the charge accumulation portion. The reset gate removes the charge generated in the photoelectric conversion portion by excitation light. The accumulation gate transfers the charge generated in the photoelectric conversion portion by fluorescence to the charge accumulation portion. The readout gate performs control for reading out the charge after the charge transfer is performed n times. The number n of the charge transfers is set for each pixel.

Provided is an image sensor including a first layer including a first semiconductor substrate including a pixel unit in which a plurality of unit pixels are provided, and a first wiring layer provided on the first semiconductor substrate, a second layer including a second semiconductor substrate on which a plurality of transistors configured to operate a global shutter operation are provided, and a second wiring layer provided on the second semiconductor substrate, and provided on the first layer such that the first wiring layer and the second wiring layer oppose each other in a first direction, a plurality of first bonding structures bonding the first layer to the second layer based on a first bonding metal exposed on a surface of the first wiring layer being in contact with a second bonding metal exposed on a surface of the second wiring layer, a third layer including a third semiconductor substrate on which a logic circuit is provided, and a third wiring layer provided on the third semiconductor substrate, and bonded to the second layer such that the second semiconductor substrate and the third wiring layer oppose each other in the first direction, and a plurality of second bonding structures extending from the second wiring layer, and bonding the second layer to the third layer based on a bonding via penetrating the second semiconductor substrate being in contact with a third bonding metal exposed to a surface of the third wiring layer.

Color mixing between pixels is prevented in a solid-state imaging element in which a pair of pixels for detecting the phase difference of a pair of light rays are arranged. A pair of photoelectric conversion elements receive a pair of light rays made by pupil-splitting. A floating diffusion layer generates a pair of pixel signals from electric charge transferred from each of the pair of photoelectric conversion elements. A pair of transfer transistors transfer the electric charge from the pair of photoelectric conversion elements to the floating diffusion layer. In a case of detecting the phase difference of the pair of light rays from the pair of pixel signals, the control unit takes control so that back gate voltages that include the back gate potentials of both of the pair of transfer transistors with respect to the potential barrier between the pair of photoelectric conversion elements have values different from values in a case of synthesizing the pair of pixel signals.

Disclosed is a CMOS image sensor with global shutters and a method for fabricating the CMOS image sensor. In one embodiment, a semiconductor device, includes: a light-sensing region; a charge-storage region; a light-shielding structure; and at least one via contact; wherein the charge-storage region is spatially configured adjacent to the light-sensing region in a lateral direction, wherein the light-shielding structure is configured over the charge-storage region in a vertical direction so as to prevent incident light leaking from the light-sensing region to the signal-processing region, wherein the light-shielding structure is configured in an interlayer dielectric (ILD) layer, and wherein the light-shielding structure is simultaneously formed with the at least one via contact.

An amplifier transistor within an image-sensor pixel is implemented upside down relative to conventional orientation such that a substrate-resident floating diffusion node of the pixel forms the gate of the amplifier transistor—achieving increased pixel conversion gain by eliminating the conventional metal-layer interconnection between the floating diffusion node and amplifier-transistor gate and concomitant parasitic capacitance.

A solid-state imaging apparatus according to an embodiment of the present disclosure includes a photoelectric transducer, a transfer transistor, a floating diffusion, a reset transistor, an amplifier transistor, and a selection transistor. The reset transistor includes a gate insulating film formed thinner than the gate insulating film of the transfer transistor.