Patent classifications
H04N25/616
Photoelectric conversion device and photoelectric conversion system
A photoelectric conversion device includes a first pixel including a photoelectric converter, a first node to which charge is transferred from the photoelectric converter, and a first transistor that resets a voltage of the first node, and configured to output a first signal in accordance with a voltage of the first node, a second pixel including a second node to which a predetermined voltage is supplied and a second transistor that resets a voltage of the second node, and configured to output a second signal in accordance with a voltage of the second node; and a control line connected to the first transistor and the second transistor. The first transistor resets the first node to a first voltage, and the second transistor resets the second node to a second voltage having a smaller amplitude than the first voltage.
RADIATION IMAGING APPARATUS, RADIATION IMAGING SYSTEM, DRIVE METHOD FOR RADIATION IMAGING APPARATUS, AND NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM
A radiation imager comprising pixels each including a converter to generate a signal, a sampling circuit and a processor is provided. The sampling circuit samples the signal with first sensitivity and with second sensitivity higher than the first sensitivity. If a first signal value obtained by sampling the signal with the first sensitivity is smaller than a first threshold, the processor generates a pixel value based on a second signal value obtained by sampling the signal with the second sensitivity, if the first signal value exceeds a second threshold larger than the first threshold value, the processor generates a pixel value based on the first signal value, and if the first signal value is not less than the first threshold and not more than the second threshold, the processor generates a pixel value based on the first and second signal values.
Electronic circuit for configuring amplifying circuit configured to output voltage including low noise
An electronic circuit is provided. The electronic circuit includes a first current generating circuit configured to output a first operating current based on a first operating voltage; and an input circuit configured to: receive a first current corresponding to a first input voltage and a second current corresponding to a second input voltage, wherein the first current and the second current are based on the first operating current; receive a third current and a fourth current that are generated based on the first operating voltage; and generate a fifth current corresponding to the second input voltage based on a second operating current. The electronic circuit is configured to generate an output voltage that is associated with a difference between the first input voltage and the second input voltage based on the second current, the fourth current and the fifth current, and the fourth current corresponds to the third current.
Imaging device
An imaging device including a photoelectric converter that converts incident light into an electric charge; a transfer transistor; a first node coupled to the photoelectric converter via the transfer transistor; a first signal detection transistor having a gate coupled to the first node; a second signal detection transistor having a gate coupled to the photoelectric converter; a signal line coupled to one of a source and a drain of the first signal detection transistor; a first transistor coupled to the first node; and a second transistor coupled to the photoelectric converter, wherein one of the source and the drain of the first signal detection transistor is coupled to the first transistor, one of a source and a drain of the second signal detection transistor is coupled to the second transistor, and no transistor is coupled between the photoelectric converter and the gate of the second signal detection transistor.
PHOTOELECTRIC CONVERSION DEVICE
A photoelectric conversion device including pixels arranged to form rows, a scanning circuit that performs scanning for sequentially outputting a signal from the pixel on a row basis, and a processing circuit that processes a signal output from the pixel. The processing circuit corrects, based on a first reset signal and a second reset signal based on a reset state of the pixel, an optical signal based on incident light. The scanning circuit performs scanning for outputting the optical signal and the first reset signal from the pixel by scans performed in different periods. The scanning circuit performs scanning for outputting the optical signal and the second reset signal from the pixel by a scan. The first reset signal, the second reset signal, and the optical signal are output from the pixel in a frame period in which signals to be used for generating a frame is output.
Solid-state imaging device, method of driving the same, and electronic apparatus
The present technology relates to a solid-state imaging device that can improve imaging quality by reducing variation in the voltage of a charge retention unit, a method of driving the solid-state imaging device, and an electronic apparatus. A first photoelectric conversion unit generates and accumulates signal charge by receiving light that has entered a pixel, and photoelectrically converting the light. A first charge retention unit retains the generated signal charge. A first output transistor outputs the signal charge in the first charge retention unit as a pixel signal, when the pixel is selected by the first select transistor. A first voltage control transistor controls the voltage of the output end of the first output transistor. The present technology can be applied to pixels in solid-state imaging devices, for example.
Image sensor including MRAM (magnetic random access memory)
A complementary metal-oxide semiconductor (CMOS) image sensor (CIS) with a simplified stacked structure and improved operation characteristics includes an upper chip, in which a plurality of pixels are arranged in a two-dimensional array structure, and a lower chip below the upper chip including a logic region having logic circuits and a memory region having embedded therein magnetic random access memory (MRAM) used as image buffer memory for storing image data processed by the logic region.
Image sensor including MRAM (magnetic random access memory)
A complementary metal-oxide semiconductor (CMOS) image sensor (CIS) with a simplified stacked structure and improved operation characteristics includes an upper chip, in which a plurality of pixels are arranged in a two-dimensional array structure, and a lower chip below the upper chip including a logic region having logic circuits and a memory region having embedded therein magnetic random access memory (MRAM) used as image buffer memory for storing image data processed by the logic region.
Imaging device and camera
An imaging device includes a pixel array, a first converter, a second converter, a first ramp signal generation circuit that is disposed closer to the first converter than to the second converter and supplies a first ramp signal to the first converter and the second converter, a first connection line having one end connected to an output terminal of the first ramp signal generation circuit and including a portion extending away from an input terminal of the first converter in a path from the one end to the other end of the first connection line, and a second connection line having one end connected to the other end of the first connection line and the other end connected to the input terminal and including a portion extending closer to the input terminal in a path from the one end to the other end of the second connection line.
SOLID-STATE IMAGING DEVICE AND IMAGING APPARATUS
A solid-state imaging device includes: a photoelectric conversion element that is disposed on a semiconductor substrate and generates signal charges by photoelectric conversion; a first diffusion layer that holds signal charges transferred from the photoelectric conversion element; a capacitive element that holds signal charges overflowing from the photoelectric conversion element; an amplifier transistor that outputs a signal according to the signal charges in the first diffusion layer; a first contact that is connected to the first diffusion layer; a second contact that is connected to a gate of the amplifier transistor; and a first wire that connects the first contact and the second contact. A shortest distance between the semiconductor substrate and the first wire is less than a shortest distance between the semiconductor substrate and the capacitive element.