Patent classifications
H04N25/65
Imaging device
In an imaging device, a first digital signal corresponding to a first analog signal read out from a pixel, and a second digital signal corresponding to the amount of charge accumulated during a first exposure period following a period for reading the first analog signal. A difference is acquired between a first difference and a second difference wherein the first difference is a difference between a third digital signal and the second digital signal, the third digital signal is a digital signal corresponding to the amount of charge cumulatively accumulated during the first exposure period and a following second exposure period, and the second difference is a difference between the second digital signal and the first digital signal. At least one of the first exposure period or the second exposure period includes a period during which the first light source is in the on-state.
SOLID-STATE IMAGING DEVICE, METHOD FOR DRIVING SOLID-STATE IMAGING DEVICE, AND ELECTRONIC APPARATUS
Provided are a solid-state imaging device, a method for driving a solid-state imaging device, and an electronic apparatus capable of reading signals produced with different conversion gains and having different signal directions.
A pixel signal processing part 400 includes a first reading part 410 and a second reading part 420. Of a pixel signal PIXOUT input into an input node ND401, the first reading part 410 inverts the signal direction of a first-conversion-gain signal (HCGRST, HCGSIG) and outputs an inverted first-conversion-gain signal (HCGRST, HCGSIG), which has been subjected to inversion and amplification, to an AD converting part 430 via a connection node ND402. Of the pixel signal PIXOUT input into the input node ND401, the second reading part 420 keeps the signal direction of a second-conversion-gain signal (LCGSIG, LCGRST) unchanged, and outputs a non-inverted second-conversion-gain signal (LCGSIG, LCGRST) to the AD converting part 430 via the connection node ND402.
IMAGING ELEMENT, PHOTODETECTOR ELEMENT, AND ELECTRONIC EQUIPMENT
An imaging element of the present disclosure includes an analog-to-digital converter configured to convert multiple analog pixel signals that are acquired under multiple imaging conditions different from each other and that are output from a pixel, to multiple digital pixel signals, a threshold setting unit configured to set, on an input side of the analog-to-digital converter, a threshold that is randomly varied, a comparison unit configured to use, as a comparison threshold, the threshold set by the threshold setting unit and compare the comparison threshold with one of the multiple analog pixel signals, and a selection unit configured to select and output, on the basis of a result of comparison from the comparison unit, one of the multiple digital pixel signals that are output from the analog-to-digital converter.
PIXEL NOISE CANCELLATION SYSTEM
Some embodiments include a system, comprising: a plurality of pixels; a plurality of data lines coupled to the pixels; a plurality of switches coupling the pixels to the data lines; a plurality of readout circuits coupled to the data lines; control logic coupled to the readout circuits, the control logic configured to, for one of the pixels: acquire a first value for the pixel while the corresponding switch is in an off state; reset the corresponding readout circuit corresponding for the pixel; acquire a second value for the pixel after resetting the readout circuit; turn on the corresponding switch; acquire a third value for the pixel after turning on the corresponding switch; and combine the first value, the second value, and the third value into a combined value for the pixel.
Signal processing device and solid-state imaging device
There is provided an imaging device, comprising differential amplifier circuitry comprising a first amplification transistor and a second amplification transistor; and a plurality of pixels including a first pixel and a second pixel, wherein the first pixel includes a first photoelectric converter, a first reset transistor, and the first amplification transistor, and wherein the second pixel includes a second photoelectric converter, a second reset transistor, and the second amplification transistor, wherein the first reset transistor is coupled to a first reset voltage, and wherein the second reset transistor is coupled to a second reset voltage different than the first reset voltage.
Image sensor having column-level correlated-double-sampling charge transfer amplifier
Correlated double sampling column-level readout of an image sensor pixel may be provided by a charge transfer amplifier that is configured and operated to itself provide for both correlated-double-sampling and amplification of floating diffusion potentials read out from the pixel onto a column bus after reset of the floating diffusion (I) but before transferring photocharge to the floating diffusion (the reset potential) and (ii) after transferring photocharge to the floating diffusion (the transfer potential). A common capacitor of the charge transfer amplifier may sample both the reset potential and the transfer potential such that a change in potential (and corresponding charge change) on the capacitor represents the difference between the transfer potential and reset potential, and the magnitude of this change is amplified by the charge change being transferred between the common capacitor and a second capacitor selectively coupled to the common capacitor.
Solid-state imaging apparatus
A solid-state imaging apparatus according to an embodiment of the present disclosure includes a photoelectric transducer, a transfer transistor, a floating diffusion, a reset transistor, an amplifier transistor, and a selection transistor. The reset transistor includes a gate insulating film formed thinner than the gate insulating film of the transfer transistor.
Imaging device
An imaging device includes a photoelectric converter that converts light into signal charge, a charge accumulation region that accumulates the signal charge, a first transistor having a gate connected to the charge accumulation region, and a common gate amplifier circuit that amplifies an output of the first transistor to output to the charge accumulation region. The common gate amplifier circuit includes a second transistor. One of a source and a drain of the second transistor is connected to one of a source and a drain of the first transistor, and the other of the source and the drain of the second transistor is connected to the charge accumulation region.
SOLID-STATE IMAGING APPARATUS AND IMAGING APPARATUS INCLUDING THE SAME
A solid-state imaging apparatus includes a pixel circuit and a negative feedback circuit. The pixel circuit includes: a photodiode; a charge storage that holds a signal charge generated by the photodiode; an amplification transistor that outputs a pixel signal corresponding to the signal charge in the charge storage; a first reset transistor that resets the charge storage; a first storage capacitive element for holding a signal charge; and a first transistor that controls the connection between the charge storage and the first storage capacitive element. The negative feedback circuit negatively feeds back a feedback signal corresponding to a reset output of the amplification transistor to the charge storage via the first reset transistor.
RAMP GENERATOR INCLUDING EMPHASIS CIRCUIT AND PRE-EMPHASIS CIRCUIT, OPERATION METHOD THEREOF, AND IMAGE SENSOR DEVICE INCLUDING THE RAMP GENERATOR
In an example embodiment, a ramp generator includes a ramp circuit that receives a first ramp enable signal from a control circuit during a first ramp period, the first ramp period including a first reset period and a first sensing period, and the ramp circuit being configured to output a first ramp signal to a correlated double sampling circuit; an emphasis circuit that increases a voltage level of the first ramp signal during the first reset period, based on a first enable signal received from the control circuit; and a pre-emphasis circuit that further increases the voltage level of the first ramp signal during a first pre-emphasis period in the first reset period, based on a second enable signal received from the control circuit.