An image sensor includes a pixel array that includes a first pixel group located in a first row and including a first select transistor and a first floating diffusion region, a second pixel group located in a second row and including a second select transistor and a second floating diffusion region, and a column line connected to both the first pixel group and the second pixel group. While charges generated by a photoelectric conversion element of the first pixel group are transferred to the first floating diffusion region, the first select transistor is turned off, the second select transistor is turned on, and a first voltage is applied to the column line through the second select transistor. A photoelectric conversion element of the second pixel group generates charges prior to the photoelectric conversion element of the first pixel group, so as to be transferred to the second floating diffusion region.

An image sensor includes a pixel array that includes a first pixel group located in a first row and including a first select transistor and a first floating diffusion region, a second pixel group located in a second row and including a second select transistor and a second floating diffusion region, and a column line connected to both the first pixel group and the second pixel group. While charges generated by a photoelectric conversion element of the first pixel group are transferred to the first floating diffusion region, the first select transistor is turned off, the second select transistor is turned on, and a first voltage is applied to the column line through the second select transistor. A photoelectric conversion element of the second pixel group generates charges prior to the photoelectric conversion element of the first pixel group, so as to be transferred to the second floating diffusion region.

A method for compensating a Power Supply Rejection Ratio (PSRR) in an image sensor, the method includes receiving, by processing circuitry, at least one analog signal from an active pixels sensor (APS) array, the at least one analog signal including power supply noise, combining, by the processing circuitry, amplified power supply noise with at least one ramp signal to obtain combined power supply noise, and compensating, by the processing circuitry, the PSRR of the APS array by cancelling the power supply noise of the at least one analog signal using the combined power supply noise.

An image sensor includes: a first readout circuit that reads out a first signal, being generated by an electric charge resulting from a photoelectric conversion, to a first signal line; a first holding circuit that holds a voltage based on an electric current from a power supply circuit; and a first electric current source that supplies the first signal line with an electric current generated by the voltage held in the first holding circuit, wherein: the first holding circuit holds the voltage based on the electric current from the power supply circuit when the first signal is not read out to the first signal line by the first readout circuit.

An image sensor includes: a first readout circuit that reads out a first signal, being generated by an electric charge resulting from a photoelectric conversion, to a first signal line; a first holding circuit that holds a voltage based on an electric current from a power supply circuit; and a first electric current source that supplies the first signal line with an electric current generated by the voltage held in the first holding circuit, wherein: the first holding circuit holds the voltage based on the electric current from the power supply circuit when the first signal is not read out to the first signal line by the first readout circuit.

An image sensor includes a first photodiode group, a second photodiode group, a first transfer transistor group, a second transfer transistor group, a floating diffusion region of a substrate in which electric charges generated in the first photodiode group are stored, and a power supply node for applying a power supply voltage to the second photodiode group. A barrier voltage is applied to at least one transfer transistor of the second transfer transistor group. The power supply voltage allows electric charges, generated in the second photodiode group, to migrate to the power supply node, and the barrier voltage forms a potential barrier between the second photodiode group and the floating diffusion region.

An image sensor includes a first photodiode group, a second photodiode group, a first transfer transistor group, a second transfer transistor group, a floating diffusion region of a substrate in which electric charges generated in the first photodiode group are stored, and a power supply node for applying a power supply voltage to the second photodiode group. A barrier voltage is applied to at least one transfer transistor of the second transfer transistor group. The power supply voltage allows electric charges, generated in the second photodiode group, to migrate to the power supply node, and the barrier voltage forms a potential barrier between the second photodiode group and the floating diffusion region.

An image sensor supporting a full resolution mode and a crop mode, the image sensor including: a pixel array including a plurality of pixels configured to generate a pixel signal by sensing an object; an analog-to-digital converter configured to convert the pixel signal into a digital signal and including a plurality of metal lines; a bias generator configured to apply a bias voltage to the plurality of metal lines; and a bias controller including: a first transistor configured to activate all of the plurality of metal lines based on a first control signal; and a second transistor configured to activate a first metal line for the crop mode among the plurality of metal lines based on a second control signal.

An image sensor supporting a full resolution mode and a crop mode, the image sensor including: a pixel array including a plurality of pixels configured to generate a pixel signal by sensing an object; an analog-to-digital converter configured to convert the pixel signal into a digital signal and including a plurality of metal lines; a bias generator configured to apply a bias voltage to the plurality of metal lines; and a bias controller including: a first transistor configured to activate all of the plurality of metal lines based on a first control signal; and a second transistor configured to activate a first metal line for the crop mode among the plurality of metal lines based on a second control signal.

A photoplethysmogram (PPG) sensor includes a pixel array that collects light, a pixel sampler that converts the light collected through the pixel array into a plurality of pixel data, an effective area determiner that determines an effective area and a non-effective area of the pixel array based on the pixel data, a power controller that is operable to cut off power to the non-effective area of the pixel array, and a PPG data generator that generates PPG data from pixel data corresponding to the effective area among the pixel data.