A galvanic isolator includes a multi-layer printed circuit board (PCB) including a dielectric material having a top side and a bottom side. An RF transmission line is embedded within the PCB including a plurality of conductor traces spaced apart from one another to include a plurality of gaps (G1 and G2) in a path of the RF transmission line to provide an inline distributed capacitor that together with an impedance of the RF transmission line forms a bandpass (BP) filter. A top metal layer is on the top side and a bottom metal layer on the bottom side connected to one another by a plurality of metal filled vias on respective sides of the RF transmission line. The top metal layer and bottom metal layer each also include at least one gap.

An apparatus comprises a printed circuit board (PCB) having a first surface and a second surface, a plurality of blind press-fit vias penetrating the first surface and extending partially through the PCB toward the second surface, the blind press-fit vias configured to receive press-fit connectors of at least one component to be connected to the PCB, and a plurality of electrical connectors disposed in a region of the second surface opposite the blind press-fit vias and configured to interface with one or more signal processing components disposed on the second surface.

The present disclosure relates to a PCB and a method in the PCB for reducing common-mode current. The PCB comprises two differential lines and each of the differential lines is on one or more planes of the PCB. The two differential lines carry a differential mode current and the common mode current. The differential mode current and the common mode current may be at least one of a forward current and a backward current. Further, a predefined configuration is formed using each of the two differential lines to generate impedance at the predefined configuration. Here, the predefined configuration is placed close to each other to generate a dielectric capacitance. The flow of the forward current and the backward current in adjacent tracks of each of the two differential lines in the predefined configuration are in opposite direction.

A capacitor that includes a substrate, a first inner electrode and a second inner electrode provided above the first main surface of the substrate, the second inner electrode arranged so as to face the first inner electrode; a dielectric layer between the first inner electrode and the second inner electrode; a first intermediate electrode connected to the first inner electrode at a plurality of first locations; first surface electrodes electrically connected to the first intermediate electrode; and a second surface electrode connected to the second inner electrode at a plurality of second locations.

The present disclosure provides circuits and methods for fabricating circuits. A circuit may include an insulator having a first surface, a second surface, a periphery, a first subset of circuit elements disposed on the first surface, a second subset of circuit elements disposed on the second surface, and at least one conductive sidewall disposed on the periphery, wherein the conductive sidewall electrically couples the first subset of circuit elements to the second subset of circuit elements.

A thin film capacitor includes: a body formed by alternately stacking first and second electrode layers, with dielectric layers therebetween on a substrate. A plurality of first vias are disposed in the body and electrically connected to the first electrode layers. A plurality of second vias are disposed in the body, electrically connected to the second electrode layers, and disposed alternately with the first vias. A first connection electrode is disposed on an upper surface of the body and connected to the plurality of first vias, a second connection electrode is disposed on the upper surface of the body and connected to the plurality of second vias, and first and second electrode pads are disposed on the first and second connection electrodes, respectively, and formed to not overlap the plurality of first and second vias.

Systems, articles, and methods for surface electromyography (“EMG”) sensors that combine elements from traditional capacitive and resistive EMG sensors are described. For example, capacitive EMG sensors that are adapted to resistively couple to a user's skin are described. Resistive coupling between a sensor electrode and the user's skin is galvanically isolated from the sensor circuitry by a discrete component capacitor included downstream from the sensor electrode. The combination of a resistively coupled electrode and a discrete component capacitor provides the respective benefits of traditional resistive and capacitive (respectively) EMG sensor designs while mitigating respective drawbacks of each approach. A wearable EMG device that provides a component of a human-electronics interface and incorporates such capacitive EMG sensors is also described.

A passive device packaging structure embedded in a glass medium according to an embodiment of the present disclosures includes a glass substrate and at least one capacitor embedded in the glass substrate. The capacitor includes an upper electrode, a dielectric layer, and a lower electrode. The glass substrate is provided on its upper surface with a cavity, the dielectric layer covers a surface of the cavity and has an area larger than that of the cavity. The upper electrode is provided on the dielectric layer. The dielectric layer and the lower electrode are connected by a metal via pillar passing through the glass substrate.

The present disclosure relates to a telecommunications jack including a housing having a port for receiving a plug. The jack also includes a plurality of contact springs adapted to make electrical contact with the plug when the plug is inserted into the port of the housing, and a plurality of wire termination contacts for terminating wires to the jack. The jack further includes a circuit board that electrically connects the contact springs to the wire termination contacts. The circuit board includes a multi-zone crosstalk compensation arrangement for reducing crosstalk at the jack.

A high-frequency device includes: a circuit substrate including dielectric layers that are stacked, wiring patterns located on at least one of the dielectric layers, and a passive element formed of at least one of the wiring patterns, the circuit substrate having a first surface that is a surface of an outermost dielectric layer in a stacking direction of the dielectric layers; a terminal for connecting the high-frequency device to an external circuit, the terminal being located on the first surface and electrically connected to the passive element through a first path in the circuit substrate; and an acoustic wave element located on the first surface and electrically connected to the passive element through a second path in the circuit substrate.