A display panel motherboard and a manufacturing method thereof are provided. The display panel motherboard comprises display panel regions (Q1) spaced apart from each other and precut regions (Q2) adjacent to the display panel regions. The manufacturing method comprises forming an electrical insulating layer (102); and removing at least portions of the electrical insulating layer provided on the precut regions (Q2). The method avoids the problem of other patterns offset on the display panel motherboard caused by the larger internal stress within the electrical insulating layer.

A flexible electronic device including a substrate and a line layer disposed on the substrate. The line layer includes a first conductive layer disposed on the substrate, a plurality of polymer walls disposed on the first conductive layer and spaced apart from each other in a horizontal direction parallel to the substrate, and a second conductive layer including first portions disposed between the polymer walls and a second portion disposed on the polymer walls. A portion of the first conductive layer contacts the first portions.

A flexible display motherboard is disclosed. The motherboard includes a first group of flexible display units, where the first group includes at least one flexible display unit. The motherboard also includes a second group of flexible display units, where the second group includes at least one flexible display unit. The motherboard also includes one or more first grooves between the first and second groups.

A display device includes: a display panel that displays an image; a first frame that supports a lower edge of the display panel; and a second frame that supports the first frame, where the second frame has a plurality of grooves formed in a bonding portion of the second frame contacting the first frame, a portion of the first frame is disposed in the grooves of the second frame, and the grooves have a width in a range of about 1 micrometer (μm) to about 30 μm.

A method for introducing at least one cutout, in particular in the form of an aperture, into a sheetlike workpiece having a thickness of less than 3 mm, involving detecting a laser beam onto the surface of the workpiece, selecting the exposure time of the laser beam to be extremely short so that only a modification of the workpiece concentrically around a beam axis of the laser beam occurs, such a modified region having defects resulting in a chain of blisters, and, as a result of the action of a corrosive medium, anisotropically removing material by successive etching in those regions of the workpiece that are formed by the defects and have previously been modified by the laser beam, resulting, along the cylindrical zone of action, in producing a cutout as an aperture in the workpiece.

A carrier substrate (1) that includes an insulation layer (11) and a metal layer (12), wherein a flank profile (2), in particular an etching flank profile, at least zonally borders the metal layer (12) in a primary direction (P) extending parallel to the main extension plane (HSE), wherein, viewed in the primary direction (P), the flank profile (2) extends from a first edge (15) on an upper side (31) of the metal layer (12), which faces away from the insulation layer (11), to a second edge (16) on a lower side (32) of the metal layer (12), which faces the insulation layer (11), characterized in that the flank profile (2), viewed in the primary direction (P), has at least one local maximum (21) and at least one local minimum (22).

The present disclosure discloses a circuit board and a manufacturing method thereof. The manufacturing method of the circuit board comprises: forming an electroplated coating on a board body of the circuit board; performing image transfer on the board body; drilling the board body after image transfer to remove a copper layer, adjacent to the two sides of a gold finger, on the circuit board, thereby forming a strip; performing forward and reverse routing towards directions away from each other respectively at the two sides of each gold finger to form a first routing tape and a second routing tape, wherein the first routing tape and the second routing tape are connected to the two ends of the strip respectively; and removing burrs on a surface of the board body through an etching process.

A circuit structure and a fabrication method thereof are provided. The fabrication method of the circuit structure includes the following steps: providing a substrate; fabricating a test circuit component on the substrate; fabricating a solder pad on the test circuit component; fabricating an insulating layer; and fabricating a conductive pad on the insulating layer. A second surface of the insulating layer covers the test circuit component and the solder pad. The conductive pad is coupled to the solder pad. Through the fabrication method of the circuit structure provided by the disclosure, circuit quality of the circuit structure may be monitored, and that reliability of the circuit structure provided by the disclosure is improved.

The present disclosure provides a method for producing a wiring substrate. A seeded substrate including an insulation substrate, a conductive undercoat layer, and a conductive seed layer provided in a first region, in that order, is first prepared. An insulation layer covering the seed layer and the undercoat layer is then formed. Subsequently, the insulation layer is etched to expose a surface of the seed layer and form a remaining insulation layer covering the undercoat layer in the second region. Subsequently, a voltage is applied between an anode and the seed layer while a solid electrolyte membrane containing a metal ion-containing aqueous solution disposed between the seed layer and the anode and the membrane and the seed layer pressed into contact with each other, thereby a metal layer being formed on the surface of the seed layer. Thereafter, the remaining insulation layer is removed and the undercoat layer is etched.

A card, e.g. a printed circuit board (PCB), has one or more conductive layers and one or more non-conductive layers disposed and alternating upon one another to form a stack. One or more of the conductive layers has one or more wiring elements within the conductive layer. The PCB/card has one or more card edges. The PCB also has a plurality of dual-level pad structures on each of one or more of the card edges. The dual-level pad structures each have an upper level, a lower level, and two or more walls. The lower level is a conductive pad with conductive surface. At least one of the conductive pads electrically connects to one or more of the wiring elements and/or one or more vias. In each of the dual-level pad structures, the walls and upper level may be made of an electrically non-conductive, insulating, or dielectric material or may be covered with a conductive material that electrically connects to conductive surface. There are different non-limiting embodiments of the structures and methods of making the structures.