A present invention provides a method for manufacturing a printed wiring board having excellent plating adhesion to a resin substrate having low surface roughness such as having surface roughness Ra of 0.2 μm or less, having excellent treating solution stability, and having high penetrability into the resin substrate. The method for manufacturing a resin substrate includes a step 1A or a step 1B; and a step 2 after the step 1A or the step 1B; and the steps are conducted before conducting electroless plating.

An article includes a glass or glass-ceramic substrate having a first major surface and a second major surface opposite the first major surface, and at least one via extending through the substrate from the first major surface to the second major surface over an axial length in an axial dimension. The article also includes a metal connector disposed within the via that hermetically seals the via. The article has a helium hermeticity of less than or equal to 1.0×10.sup.−8 atm-cc/s after 1000 thermal shock cycles, each of the thermal shock cycle comprises cooling the article to a temperature of −40° C. and heating the article to a temperature of 125° C., and the article has a helium hermeticity of less than or equal to 1.0×10.sup.−8 atm-cc/s after 100 hours of HAST at a temperature of 130° C. and a relative humidity of 85%.

According to various embodiments described herein, an article comprises a glass or glass-ceramic substrate having a first major surface and a second major surface opposite the first major surface, and a via extending through the substrate from the first major surface to the second major surface over an axial length in an axial direction. The article further comprises a helium hermetic adhesion layer disposed on the interior surface; and a metal connector disposed within the via, wherein the metal connector is adhered to the helium hermetic adhesion layer. The metal connector coats the interior surface of the via along the axial length of the via to define a first cavity from the first major surface to a first cavity length, the metal connector comprising a coating thickness of less than 12 μm at the first major surface. Additionally, the metal connector coats the interior surface of the via along the axial length of the via to define a second cavity from the second major surface to a second cavity length, the metal connector comprising a coating thickness of less than 12 μm at the second major surface and fully fills the via between the first cavity and the second cavity.

The present disclosure describes a storage device including a top panel, a bottom panel, a back panel, a front panel, and two side panels configured to form an enclosed volume. The storage device further includes multiple slots disposed at inner surfaces of the two side panels and configured to hold a substrate, a gas diffuser disposed at an inner surface of the back panel and configured to provide a purge gas to the enclosed volume, an isolation gas device disposed on an inner surface of the top panel and adjacent to a top portion of the front panel, and an isolation gas line configured to connect the isolation gas device to the gas diffuser. The isolation gas device is configured to inject the purge gas into a front portion of the storage device and in a direction from the top panel toward the bottom panel.

A wiring substrate includes an insulating layer having through holes, a first conductor layer formed on first surface of the insulating layer, a second conductor layer formed on second surface of the insulting layer on the opposite side, and interlayer connection conductors formed in the through holes through the insulating layer and connecting the first and second conductor layers. The insulating layer is formed such that the though holes include first and second groups of through holes and that the through holes in the second group have inner walls covered with non-conductive resin, and the interlayer conductors includes first interlayer conductors each including a plating film formed in the first group of through holes, and second interlayer conductors each including a plating film formed in the second group of through holes such that minimum distance between the second interlayer conductors is smaller than minimum distance between the first interlayer conductors.

The disclosure relates to methods, kits and compositions for direct printing of double-sided and/or multilayered printed circuit boards. Specifically, the disclosure relates to the printing of conductive leads and insulating portions of printed circuit boards using inkjet printing.

Forming, in a printed-wiring board, a via sufficiently filled without residual smear, for use in an insulating layer and the size of the via to be formed. A via of a printed-wiring board comprises a first filling portion which fills at least a center portion of a hole, and a second filling portion which fills a region of the hole that is not filled with the first filling portion. An interface which exists between the second and first filling portions, or an interface which exists between the second filling portion and an insulating layer and the first filling portion has the shape of a truncated cone comprising a tapered surface which is inclined to become thinner from a first surface toward a second surface, and an upper base surface which is positioned in parallel to the second surface and closer to the first surface than to the second surface.

A method for repairing a fine line is provided. Nano metal particles are filled in a defect of a circuit board. The nano metal particles in the defect are irradiated by a laser, or heated, such that the nano metal particles in the defect are metallurgically bonded to an original line of the circuit board. A surface of the circuit board is cleaned to remove residual nano metal particles on parts of the circuit board where metallurgical bonding is not performed, thereby completing line repairing of the circuit board.

A wiring substrate includes an insulating layer having through holes, a first conductor layer formed on first surface of the insulating layer, a second conductor layer formed on second surface of the insulting layer on the opposite side, and interlayer connection conductors formed in the through holes through the insulating layer and connecting the first and second conductor layers. The insulating layer is formed such that the though holes include first and second groups of through holes and that the through holes in the second group have inner walls covered with non-conductive resin, and the interlayer conductors includes first interlayer conductors each including a plating film formed in the first group of through holes, and second interlayer conductors each including a plating film formed in the second group of through holes such that minimum distance between the second interlayer conductors is smaller than minimum distance between the first interlayer conductors.

A method of producing a printed electronic device on a thin PDMS film which includes coupling a first layer of a water-soluble polymer to a substrate and drying the first layer of the water-soluble polymer. The method further includes coupling a second layer of a crosslinkable PDMS polymer to the first layer of the water-soluble polymer and curing the second layer of the crosslinkable PDMS polymer to form the thin PDMS film. The method also includes printing one or more functional layers on the thin PDMS film and drying the one or more functional layers on the thin PDMS film to form the printed electronic device coupled to the substrate.