A method creating a patterned film with cuprous oxide and light comprising the steps of electrodepositing copper from a solution onto a substrate; illuminating selected areas of said deposited copper with light having photon energies above the band gap energy of 2.0eV to create selected illuminated sections and non-illuminated sections; and stripping non-illuminated sections leaving said illuminated sections on the substrate. An additional step may include galvanically replacing the copper with one or more noble metals.

A method to remove slugs from a circuitry pattern on the fly during the fabrication of a flexible printed circuit, the method includes applying a coverlay reel-to-reel onto one side of the metal foil on the fly and applying a sacrificial liner reel-to-reel onto another side of the metal foil on the fly. Then, after the slugs and circuitry patterns are created from laser ablation, the slug can be removed by applying compressed air to the slugs and/or peeling off the sacrificial liner from the circuitry pattern reel-to-reel.

Depicted embodiments are directed to an Application Specific Electronics Packaging (ASEP) system, which enables the manufacture of additional products using reel to reel (68a, 68b) manufacturing processes as opposed to the batch processes used to currently manufacture electronic products and MIDs. Through certain ASEP embodiments, it is possible to integrate connectors, sensors, LEDs, thermal management, antennas, RFID devices, microprocessors, memory, impedance control, and multi-layer functionality directly into a product.

A circuit board includes: an insulating layer having at least a part formed of an insulating resin; and an electrode pad embedded in the insulating layer and having a neck formed on an outer side surface, the neck being held in contact with the insulating resin of the insulating layer. The electrode pad includes: a first conductor layer having an end surface exposed from one surface of the insulating layer; and a second conductor layer formed on the first conductor layer and having a grain boundary density different from a grain boundary density of the first conductor layer. The neck is formed in a region of the outer side surface, the region corresponding to a boundary part between the first conductor layer and the second conductor layer.

A manufacturing method for a circuit board and a circuit board are provided. The method includes steps: providing a substrate having a first metal layer; forming a patterned first opening on the first metal layer to expose the substrate; forming a patterned first dielectric layer on the substrate, the first dielectric layer is made of a photosensitive dielectric material and covers the first opening; photosensitizing the first dielectric layer to cure the first dielectric layer; forming a patterned second metal layer on the first metal layer; forming a patterned third metal layer on the second metal layer, and the third metal layer being adjacent to the first dielectric layer; removing a portion of the first metal layer not covered by the second metal layer; and forming a second dielectric layer on the substrate. A thickness of the third metal layer is greater than a thickness of the second metal layer.

The direct patterning method includes: providing a substrate having a display area and a peripheral area, which a peripheral circuit having a bonding pad is disposed on the peripheral area; sequentially disposing a metal nanowire layer, a pre-cured film layer and a negative-type photosensitive layer thereon; performing a photolithography step; and curing the pre-cured film layer. The photolithography step includes exposing the negative-type photosensitive layer to define a removal region and a reserved region; and removing the negative-type photosensitive layer, the pre-cured film layer and the metal nanowire layer in the removal region by using a developer, such that a touch sensing electrode is fabricated in the display area and the bonding pad is exposed.

A method of manufacturing support elements for lighting devices includes: providing an elongated, electrically non-conductive substrate with opposed surfaces, with an electrically-conductive layer extending along one of said opposed surfaces, etching said electrically-conductive layer to provide a set of electrically-conductive tracks extending along the non-conductive substrate with at least one portion of the non-conductive substrate left free by the set of electrically-conductive tracks, forming a network of electrically-conductive lines coupleable with at least one light radiation source at said portion of said non-conductive substrate left free by the electrically-conductive tracks. Said forming operation includes selectively removing e.g. via laser etching a further electrically-conductive layer provided on said non-conductive substrate, or printing electrically-conductive material onto the non-conductive substrate. The electrically-conductive tracks and the network of electrically-conductive lines may be coupled with each other e.g. by means of electrically-conductive vias extending through the non-conductive substrate.

A method creating a patterned film with cuprous oxide and light comprising the steps of electrodepositing copper from a solution onto a substrate; illuminating selected areas of said deposited copper with light having photon energies above the band gap energy of 2.0 eV to create selected illuminated sections and non-illuminated sections; and stripping non-illuminated sections leaving said illuminated sections on the substrate. An additional step may include galvanically replacing the copper with one or more noble metals.

Disclosed are a hole connecting layer manufacturing method, a circuit board manufacturing method and a circuit board. The hole connecting layer manufacturing method comprises: adhering a first insulating dielectric layer, used for laminating and filling, to a daughter board; laminating and solidifying the first insulating dielectric layer on the daughter board; adhering a second insulating dielectric layer, used for laminating and filling, to the first insulating dielectric layer which has been laminated and solidified; manufacturing a first receiving hole on the first insulating dielectric layer and a second receiving hole on the second insulating dielectric layer, wherein the first receiving hole and the second receiving hole are provided vertically opposite to each other; filling both the first receiving hole and the second receiving hole with a conductive medium to complete manufacturing of the hole connecting layer.

A fabrication process for soft-matter printed circuit boards is disclosed in which traces of liquid-phase GaIn eutectic (eGaIn) are patterned with UV laser micromachining (UVLM). The terminals of the elastomer-sealed LM circuit connect to the surface mounted chips through vertically-aligned columns of eGaIn-coated ferromagnetic microspheres that are embedded within an interfacial elastomer layer.