A printed circuit board can include a substrate layer, a first metal layer disposed over the substrate layer, a core layer disposed over the first metal layer, and a second metal layer disposed over the core layer, where the core layer defines a closed cavity between the first and second metal layers. Optionally, the cavity is filled with air and operates as an antenna.

The present invention relates to a metal oxide nanoparticle ink composition, a method of producing the same, and a method of forming a conductive layer pattern by using the metal oxide nanoparticle ink composition, and more particularly, to a metal oxide nanoparticle ink composition for forming a conductive layer by irradiating an ink composition thin film containing nickel oxide nanoparticles with a sintering laser, a method of producing the same, and a method of forming a conductive layer pattern by using the metal oxide nanoparticle ink composition.

A multilayer substrate includes a base in which insulating base material layers including a thermoplastic resin are stacked, a conductor provided on at least one of the insulating base material layers, a ground electrode and a ground conductor, and a metal member connected to the conductor. The metal member is disposed inside the base and includes a portion extending in at least a stacking direction of the insulating base material layers and a portion extending in a planar direction parallel or substantially parallel to a principal surface of the insulating base material layers, and the metal member defines at least a portion of a circuit in contact with the base.

A circuit board includes an insulator layer, an electronic component built into the insulator layer, a first via penetrating the insulator layer, a second via extending from one surface of the insulator layer and coupled to the electronic component, and a metal layer formed over the one surface of the insulator layer, wherein a via pad is formed over the second via, an opening is formed between the metal layer and a first via side of the via pad, and the opposite side of the via pad to the first via side is coupled to the metal layer.

A method of mass spectral analysis in an analytical electrostatic trap (14) is disclosed. The electrostatic trap (14) defines an electrostatic field volume and includes trap electrodes having static and non-ramped potentials. The method comprises injecting a continuous ion beam into the electrostatic field volume.

Depicted embodiments are directed to an Application Specific Electronics Packaging (ASEP) system, which enables the manufacture of additional products using reel to reel (68a, 68b) manufacturing processes as opposed to the batch processes used to currently manufacture electronic products and MIDs. Through certain ASEP embodiments, it is possible to integrate connectors, sensors, LEDs, thermal management, antennas, RFID devices, microprocessors, memory, impedance control, and multi-layer functionality directly into a product.

A component carrier including an electrically insulating core, at least one electronic component embedded in the core, and a coupling structure with at least one electrically conductive through-connection extending at least partially therethrough and having a component contacting end and a wiring contacting end. The electronic component directly contacts the component contacting end. The wiring contacting end is directly electrically contacted to the wiring structure. The exterior surface portion of the coupling structure has homogeneous ablation properties and surface recesses filled with an electrically conductive wiring structure. A method includes embedding an electronic component in an electrically insulating core, providing a coupling structure with a conductive connection having a component end and a wiring end, connecting the electronic component directly to the component end, providing a surface portion of the coupling structure with homogeneous ablation properties, patterning the surface portion with recesses and filling the recesses with a wiring structure such that the wiring end is contacted directly.

A circuit board comprising a substrate and a circuit trace. The substrate includes a surface etched via ion milling over a circuit area such that the surface has an increased roughness. The circuit trace forms portions of an electronic circuit and may be created from a thin conductive film deposited on the surface within the circuit area. The circuit trace adheres more strongly to the roughened substrate surface, which prevents the circuit trace from peeling or becoming delaminated from the substrate surface.

The present invention provides a thinned flexible polyimide substrate and a method for manufacturing the same. The thinned flexible polyimide substrate comprises a polyimide resin, a conductor layer, and a polyimide insulating layer. The polyimide resin has a linear thermal expansion coefficient of less than 40 ppm/K. The conductor layer is formed of a plurality of stacked metal nanoparticles having pores therebetween, and each of the pores has a size between 0.1 m and 1 m. A portion of the polyimide resin fills into the pores. The polyimide insulating layer is formed of the polyimide resin coated on the conductor layer.

A circuit board comprising a substrate and a circuit trace. The substrate includes a surface etched via ion milling over a circuit area such that the surface has an increased roughness. The circuit trace forms portions of an electronic circuit and may be created from a thin conductive film deposited on the surface within the circuit area. The circuit trace adheres more strongly to the roughened substrate surface, which prevents the circuit trace from peeling or becoming delaminated from the substrate surface.