H05K3/107

METHOD FOR FORMING PATTERN ON SUBSTRATE STRUCTURE WITHOUT USING MASK LAYER AND SUBSTRATE STRUCTURE
20230199968 · 2023-06-22 ·

A method for forming a pattern on a substrate structure without using a mask layer and a substrate structure are provided. The method includes providing an electrically insulating substrate structure including a thermally conductive and electrically insulating layer, forming at least one electrically conductive recess by removing one part of the electrically conductive layer by a machining process so as to form a predetermined thickness ratio between a thickness of the electrically conductive recess and a thickness of the electrically conductive layer, and removing another part of the electrically conductive layer that is reserved below the electrically conductive recess so that the electrically conductive recess forms an electrically conductive groove.

PACKAGE STRUCTURE AND FABRICATION METHODS

The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.

Method for fabricating blackened conductive patterns

The present invention relates to a method for fabricating blackened conductive patterns, which includes (i) forming a resist layer on a non-conductive substrate; (ii) forming fine pattern grooves in the resist layer using a laser beam; (iii) forming a mixture layer containing a conductive material and a blackening material in the fine pattern grooves; and (iv) removing the resist layer remained on the non-conductive substrate.

Impedence matching conductive structure for high efficiency RF circuits
11677373 · 2023-06-13 · ·

The present invention includes a method of making a RF impedance matching device in a photo definable glass ceramic substrate. A ground plane may be used to adjacent to or below the RF Transmission Line in order to prevent parasitic electronic signals, RF signals, differential voltage build up and floating grounds from disrupting and degrading the performance of isolated electronic devices by the fabrication of electrical isolation and ground plane structures on a photo-definable glass substrate.

RECONSTITUTED SUBSTRATE FOR RADIO FREQUENCY APPLICATIONS
20220359409 · 2022-11-10 ·

The present disclosure relates to methods and apparatus for forming thin-form-factor reconstituted substrates and semiconductor device packages for radio frequency applications. The substrate and package structures described herein may be utilized in high-density 2D and 3D integrated devices for 4G, 5G, 6G, and other wireless network systems. In one embodiment, a silicon substrate is structured by laser ablation to include cavities for placement of semiconductor dies and vias for deposition of conductive interconnections. Additionally, one or more cavities are structured to be filled or occupied with a flowable dielectric material. Integration of one or more radio frequency components adjacent the dielectric-filled cavities enables improved performance of the radio frequency elements with reduced signal loss caused by the silicon substrate.

CIRCUIT BOARD ASSEMBLY AND MANUFACTURING METHOD THEREOF
20230171875 · 2023-06-01 ·

The disclosure provides a circuit board assembly, which includes a core layer, an electronic component, a first shielding ring wall, a second shielding ring wall, a first circuit layer, a second circuit layer, a first insulating layer and a plurality of shielding columns. The core layer has an accommodating space, in which the accommodating space has an inner sidewall. The electronic component is disposed in the accommodating space. The first shielding ring wall is disposed in the accommodating space and covers the inner sidewall, in which the first shielding ring wall surrounds the electronic component and is not in contact with the electronic component. The second shielding ring wall is disposed in the core layer and surrounds the first shielding ring wall. The core layer is disposed between the first circuit layer and the second circuit layer. The shielding columns are disposed in the first insulating layer.

Electronic-component manufacturing method and electronic components

Provided are an electronic component manufacturing method by which even a platable layer made of a difficult-to-plate material can be easily plated with good adhesion without using a special chemical solution or a photolithography technique, and an electronic component which has a peel strength of 0.1 N/mm or greater as measured by a copper foil peel test. A picosecond laser beam having a pulse duration on the order of a picosecond or a femtosecond laser beam having a pulse duration on the order of a femtosecond is emitted at a surface of a platable layer (2) in order to roughen the surface, a wiring pattern is formed using a mask (13), and a plated part (12) is formed on the surface of the wiring pattern.

Reconstituted substrate structure and fabrication methods for heterogeneous packaging integration

The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.

Chip part having passive elements on a common substrate
09812412 · 2017-11-07 · ·

A chip part includes a substrate, a first electrode and a second electrode which are formed apart from each other on the substrate and a circuit network which is formed between the first electrode and the second electrode. The circuit network includes a first passive element including a first conductive member embedded in a first trench formed in the substrate and a second passive element including a second conductive member formed on the substrate outside the first trench.

Liquid metal-based flexible electronic device and preparation method and use thereof

Provided is a liquid metal-based flexible electronic device and a method for preparing a liquid metal-based flexible electronic device, that includes: preparing an Acrylonitrile Butadiene Styrene (ABS) plastic model; performing an ion sputtering on a surface of the ABS plastic model to form a gold film, to obtain a gold-plated ABS circuit; introducing a first silica gel into a mold to suspend the gold-plated ABS circuit inside the mold, and curing the first silica gel to obtain a cured model; immersing the cured model in acetone to dissolve the ABS model, to obtain a microchannel with a gold plating on an inner wall of the microchannel in a first silica gel substrate; and injecting a gallium-indium eutectic, inserting a copper wire, and applying a second silica gel and curing the second silica gel, to obtain the liquid metal-based flexible electronic device.